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<div class="header">
  <div class="headertitle"><div class="title">clocks.h</div></div>
</div><!--header-->
<div class="contents">
<div class="fragment"><div class="line"><a id="l00001" name="l00001"></a><span class="lineno">    1</span><span class="comment">// THIS HEADER FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT</span></div>
<div class="line"><a id="l00002" name="l00002"></a><span class="lineno">    2</span> </div>
<div class="line"><a id="l00008" name="l00008"></a><span class="lineno">    8</span><span class="preprocessor">#ifndef _HARDWARE_STRUCTS_CLOCKS_H</span></div>
<div class="line"><a id="l00009" name="l00009"></a><span class="lineno">    9</span><span class="preprocessor">#define _HARDWARE_STRUCTS_CLOCKS_H</span></div>
<div class="line"><a id="l00010" name="l00010"></a><span class="lineno">   10</span> </div>
<div class="line"><a id="l00015" name="l00015"></a><span class="lineno">   15</span><span class="preprocessor">#include &quot;<a class="code" href="address__mapped_8h.html">hardware/address_mapped.h</a>&quot;</span></div>
<div class="line"><a id="l00016" name="l00016"></a><span class="lineno">   16</span><span class="preprocessor">#include &quot;hardware/regs/clocks.h&quot;</span></div>
<div class="line"><a id="l00017" name="l00017"></a><span class="lineno">   17</span> </div>
<div class="line"><a id="l00018" name="l00018"></a><span class="lineno">   18</span><span class="comment">// Reference to datasheet: https://datasheets.raspberrypi.com/rp2040/rp2040-datasheet.pdf#tab-registerlist_clocks</span></div>
<div class="line"><a id="l00019" name="l00019"></a><span class="lineno">   19</span><span class="comment">//</span></div>
<div class="line"><a id="l00020" name="l00020"></a><span class="lineno">   20</span><span class="comment">// The _REG_ macro is intended to help make the register navigable in your IDE (for example, using the &quot;Go to Definition&quot; feature)</span></div>
<div class="line"><a id="l00021" name="l00021"></a><span class="lineno">   21</span><span class="comment">// _REG_(x) will link to the corresponding register in hardware/regs/clocks.h.</span></div>
<div class="line"><a id="l00022" name="l00022"></a><span class="lineno">   22</span><span class="comment">//</span></div>
<div class="line"><a id="l00023" name="l00023"></a><span class="lineno">   23</span><span class="comment">// Bit-field descriptions are of the form:</span></div>
<div class="line"><a id="l00024" name="l00024"></a><span class="lineno">   24</span><span class="comment">// BITMASK [BITRANGE] FIELDNAME (RESETVALUE) DESCRIPTION</span></div>
<div class="line"><a id="l00025" name="l00025"></a><span class="lineno">   25</span> </div>
<div class="line"><a id="l00030" name="l00030"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gacf8c8ac7970cacdec6c5f62a62926644">   30</a></span><span class="keyword">typedef</span> <span class="keyword">enum</span> <a class="code hl_enumeration" href="group__hardware__clocks.html#gacf8c8ac7970cacdec6c5f62a62926644">clock_num_rp2040</a> {</div>
<div class="line"><a id="l00031" name="l00031"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644a8c35a604478e413afed2b3c558df5c64">   31</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644a8c35a604478e413afed2b3c558df5c64">clk_gpout0</a> = 0, </div>
<div class="line"><a id="l00032" name="l00032"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644aa1515365ea7f6fc7815d71ac584fcc65">   32</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644aa1515365ea7f6fc7815d71ac584fcc65">clk_gpout1</a> = 1, </div>
<div class="line"><a id="l00033" name="l00033"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644a913a8ae975120951e7d5c5c3df66f20f">   33</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644a913a8ae975120951e7d5c5c3df66f20f">clk_gpout2</a> = 2, </div>
<div class="line"><a id="l00034" name="l00034"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644ad95941e57d81620130a1b108e0f57b51">   34</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644ad95941e57d81620130a1b108e0f57b51">clk_gpout3</a> = 3, </div>
<div class="line"><a id="l00035" name="l00035"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644abba6c078e66ad1a30d5b2b15b62093c4">   35</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644abba6c078e66ad1a30d5b2b15b62093c4">clk_ref</a> = 4, </div>
<div class="line"><a id="l00036" name="l00036"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644ac1ad7b83e348265a82c8d234489d62ab">   36</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644ac1ad7b83e348265a82c8d234489d62ab">clk_sys</a> = 5, </div>
<div class="line"><a id="l00037" name="l00037"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644a917c020907b42e257410e885822f6c71">   37</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644a917c020907b42e257410e885822f6c71">clk_peri</a> = 6, </div>
<div class="line"><a id="l00038" name="l00038"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644acfa6bf0bcaef61805201373db18ed115">   38</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644acfa6bf0bcaef61805201373db18ed115">clk_usb</a> = 7, </div>
<div class="line"><a id="l00039" name="l00039"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644afb4bd0bf16d8916c4cb56fa77b4f0b0d">   39</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644afb4bd0bf16d8916c4cb56fa77b4f0b0d">clk_adc</a> = 8, </div>
<div class="line"><a id="l00040" name="l00040"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644a7af7fc21d0d48fc06d9476ebb7236e16">   40</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644a7af7fc21d0d48fc06d9476ebb7236e16">clk_rtc</a> = 9, </div>
<div class="line"><a id="l00041" name="l00041"></a><span class="lineno">   41</span>    CLK_COUNT</div>
<div class="line"><a id="l00042" name="l00042"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gae5b3d4a25ed3bb4916782746a6279507">   42</a></span>} <a class="code hl_typedef" href="group__hardware__clocks.html#gae5b3d4a25ed3bb4916782746a6279507">clock_num_t</a>;</div>
<div class="line"><a id="l00044" name="l00044"></a><span class="lineno">   44</span> </div>
<div class="line"><a id="l00048" name="l00048"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#ga531be47022a78745db42ab7b29da20e0">   48</a></span><span class="keyword">typedef</span> <span class="keyword">enum</span> <a class="code hl_enumeration" href="group__hardware__clocks.html#ga531be47022a78745db42ab7b29da20e0">clock_dest_num_rp2040</a> {</div>
<div class="line"><a id="l00049" name="l00049"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0aa7a13316822ebdd07cdff5d1153e5310">   49</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0aa7a13316822ebdd07cdff5d1153e5310">CLK_DEST_SYS_CLOCKS</a> = 0, </div>
<div class="line"><a id="l00050" name="l00050"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a82f9dca3d810a91d3bcb0c55bb0f4c19">   50</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a82f9dca3d810a91d3bcb0c55bb0f4c19">CLK_DEST_ADC_ADC</a> = 1, </div>
<div class="line"><a id="l00051" name="l00051"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0adbfba27500f20882fb56f18ad253fe99">   51</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0adbfba27500f20882fb56f18ad253fe99">CLK_DEST_SYS_ADC</a> = 2, </div>
<div class="line"><a id="l00052" name="l00052"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a15ec1c8d5bbfc27b125f8cee2bfdd195">   52</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a15ec1c8d5bbfc27b125f8cee2bfdd195">CLK_DEST_SYS_BUSCTRL</a> = 3, </div>
<div class="line"><a id="l00053" name="l00053"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0ab4619e35c93f6d3ced95dc46a9985111">   53</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0ab4619e35c93f6d3ced95dc46a9985111">CLK_DEST_SYS_BUSFABRIC</a> = 4, </div>
<div class="line"><a id="l00054" name="l00054"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0ab755ea73b6228c074c77af35bd685138">   54</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0ab755ea73b6228c074c77af35bd685138">CLK_DEST_SYS_DMA</a> = 5, </div>
<div class="line"><a id="l00055" name="l00055"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0acea8045f9a17d3b88e6f3317de4998fa">   55</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0acea8045f9a17d3b88e6f3317de4998fa">CLK_DEST_SYS_I2C0</a> = 6, </div>
<div class="line"><a id="l00056" name="l00056"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a48d42cf1310af2059f28646feb4b3dc0">   56</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a48d42cf1310af2059f28646feb4b3dc0">CLK_DEST_SYS_I2C1</a> = 7, </div>
<div class="line"><a id="l00057" name="l00057"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a8791146f5044f87ecad1240400524783">   57</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a8791146f5044f87ecad1240400524783">CLK_DEST_SYS_IO</a> = 8, </div>
<div class="line"><a id="l00058" name="l00058"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a86acc3f11f842c926a33e9041f0d7d97">   58</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a86acc3f11f842c926a33e9041f0d7d97">CLK_DEST_SYS_JTAG</a> = 9, </div>
<div class="line"><a id="l00059" name="l00059"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a926ae7e7d7f16c9068b5771c4ab0cf31">   59</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a926ae7e7d7f16c9068b5771c4ab0cf31">CLK_DEST_SYS_VREG_AND_CHIP_RESET</a> = 10, </div>
<div class="line"><a id="l00060" name="l00060"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a5073bc32f089257f5ce13fcf9dccfd66">   60</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a5073bc32f089257f5ce13fcf9dccfd66">CLK_DEST_SYS_PADS</a> = 11, </div>
<div class="line"><a id="l00061" name="l00061"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a7ad1ec92e507d96db3c62458345388b3">   61</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a7ad1ec92e507d96db3c62458345388b3">CLK_DEST_SYS_PIO0</a> = 12, </div>
<div class="line"><a id="l00062" name="l00062"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a1b7c866f60f6d7a3599851eda6236873">   62</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a1b7c866f60f6d7a3599851eda6236873">CLK_DEST_SYS_PIO1</a> = 13, </div>
<div class="line"><a id="l00063" name="l00063"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0aaf028e60c1678efe0e465a5c4e63be11">   63</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0aaf028e60c1678efe0e465a5c4e63be11">CLK_DEST_SYS_PLL_SYS</a> = 14, </div>
<div class="line"><a id="l00064" name="l00064"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a271e8b16de996d59cf242f3aca93a2f4">   64</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a271e8b16de996d59cf242f3aca93a2f4">CLK_DEST_SYS_PLL_USB</a> = 15, </div>
<div class="line"><a id="l00065" name="l00065"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a1dc3155054ea4ba3d0d93c26fdea0d4d">   65</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a1dc3155054ea4ba3d0d93c26fdea0d4d">CLK_DEST_SYS_PSM</a> = 16, </div>
<div class="line"><a id="l00066" name="l00066"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a9efe04f57df4b458903c403addec9483">   66</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a9efe04f57df4b458903c403addec9483">CLK_DEST_SYS_PWM</a> = 17, </div>
<div class="line"><a id="l00067" name="l00067"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0ad5cf6d4b4c6dcc60f79491e33604a9e9">   67</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0ad5cf6d4b4c6dcc60f79491e33604a9e9">CLK_DEST_SYS_RESETS</a> = 18, </div>
<div class="line"><a id="l00068" name="l00068"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0ae875abcf316976020784c41df511d47a">   68</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0ae875abcf316976020784c41df511d47a">CLK_DEST_SYS_ROM</a> = 19, </div>
<div class="line"><a id="l00069" name="l00069"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a6ee938da9230f98365dc67ece536c0d4">   69</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a6ee938da9230f98365dc67ece536c0d4">CLK_DEST_SYS_ROSC</a> = 20, </div>
<div class="line"><a id="l00070" name="l00070"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a863510ab355fb0af8763acca9d54146a">   70</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a863510ab355fb0af8763acca9d54146a">CLK_DEST_RTC_RTC</a> = 21, </div>
<div class="line"><a id="l00071" name="l00071"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0af7e06e650c8533c8a09dc9bbcee9da34">   71</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0af7e06e650c8533c8a09dc9bbcee9da34">CLK_DEST_SYS_RTC</a> = 22, </div>
<div class="line"><a id="l00072" name="l00072"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a1cd7587c812db4711ac8d27773fb8e14">   72</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a1cd7587c812db4711ac8d27773fb8e14">CLK_DEST_SYS_SIO</a> = 23, </div>
<div class="line"><a id="l00073" name="l00073"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a8f3ca54d0df7350adb6490c17f01a151">   73</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a8f3ca54d0df7350adb6490c17f01a151">CLK_DEST_PERI_SPI0</a> = 24, </div>
<div class="line"><a id="l00074" name="l00074"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0aac3c334ad4b9eb5e6b77d306f9cf6690">   74</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0aac3c334ad4b9eb5e6b77d306f9cf6690">CLK_DEST_SYS_SPI0</a> = 25, </div>
<div class="line"><a id="l00075" name="l00075"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0ac8f3984ecd0d63da5c94bc4441d5fdbf">   75</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0ac8f3984ecd0d63da5c94bc4441d5fdbf">CLK_DEST_PERI_SPI1</a> = 26, </div>
<div class="line"><a id="l00076" name="l00076"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a7db9d6d1b85c7e8d013147af55ac254f">   76</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a7db9d6d1b85c7e8d013147af55ac254f">CLK_DEST_SYS_SPI1</a> = 27, </div>
<div class="line"><a id="l00077" name="l00077"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0aa6b672bba828f538d59cffe4bc56b870">   77</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0aa6b672bba828f538d59cffe4bc56b870">CLK_DEST_SYS_SRAM0</a> = 28, </div>
<div class="line"><a id="l00078" name="l00078"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a5c1252a95489d26504d348a6f19e67b0">   78</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a5c1252a95489d26504d348a6f19e67b0">CLK_DEST_SYS_SRAM1</a> = 29, </div>
<div class="line"><a id="l00079" name="l00079"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a7ae6e07aa86527443649f572c24d1122">   79</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a7ae6e07aa86527443649f572c24d1122">CLK_DEST_SYS_SRAM2</a> = 30, </div>
<div class="line"><a id="l00080" name="l00080"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0ad7e2e7aeebabc9a8f4e1a6f6da524d71">   80</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0ad7e2e7aeebabc9a8f4e1a6f6da524d71">CLK_DEST_SYS_SRAM3</a> = 31, </div>
<div class="line"><a id="l00081" name="l00081"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a677f4e9d98d29174fec1004f6e23b2c2">   81</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a677f4e9d98d29174fec1004f6e23b2c2">CLK_DEST_SYS_SRAM4</a> = 32, </div>
<div class="line"><a id="l00082" name="l00082"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a7b3c35197cbab8b5ab72b48a82f32311">   82</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a7b3c35197cbab8b5ab72b48a82f32311">CLK_DEST_SYS_SRAM5</a> = 33, </div>
<div class="line"><a id="l00083" name="l00083"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a92b8a0c0a339b0f99c691fda320ff861">   83</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a92b8a0c0a339b0f99c691fda320ff861">CLK_DEST_SYS_SYSCFG</a> = 34, </div>
<div class="line"><a id="l00084" name="l00084"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a8b535a46ba2d708945181d4cca938eac">   84</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a8b535a46ba2d708945181d4cca938eac">CLK_DEST_SYS_SYSINFO</a> = 35, </div>
<div class="line"><a id="l00085" name="l00085"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a23baa826e55d0832bce75b9e2e754a57">   85</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a23baa826e55d0832bce75b9e2e754a57">CLK_DEST_SYS_TBMAN</a> = 36, </div>
<div class="line"><a id="l00086" name="l00086"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0aa44be434dc7d9edafd44b3a4f571a57e">   86</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0aa44be434dc7d9edafd44b3a4f571a57e">CLK_DEST_SYS_TIMER</a> = 37, </div>
<div class="line"><a id="l00087" name="l00087"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a2e51b16c56acbeb6653950af41e53b76">   87</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a2e51b16c56acbeb6653950af41e53b76">CLK_DEST_PERI_UART0</a> = 38, </div>
<div class="line"><a id="l00088" name="l00088"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a2251766749e744153aaf4d346106b69c">   88</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a2251766749e744153aaf4d346106b69c">CLK_DEST_SYS_UART0</a> = 39, </div>
<div class="line"><a id="l00089" name="l00089"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a67d5461d0b587344012b3e6115a97268">   89</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a67d5461d0b587344012b3e6115a97268">CLK_DEST_PERI_UART1</a> = 40, </div>
<div class="line"><a id="l00090" name="l00090"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0aaad38671055261992e9f624b24a708f7">   90</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0aaad38671055261992e9f624b24a708f7">CLK_DEST_SYS_UART1</a> = 41, </div>
<div class="line"><a id="l00091" name="l00091"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a2a29b91d850c1b0b6dd1610d8b2f361a">   91</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a2a29b91d850c1b0b6dd1610d8b2f361a">CLK_DEST_SYS_USBCTRL</a> = 42, </div>
<div class="line"><a id="l00092" name="l00092"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0acc49f83fc860608938bf4aeb146f8076">   92</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0acc49f83fc860608938bf4aeb146f8076">CLK_DEST_USB_USBCTRL</a> = 43, </div>
<div class="line"><a id="l00093" name="l00093"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a6924053ca1ffe2b13ae349b720d61444">   93</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a6924053ca1ffe2b13ae349b720d61444">CLK_DEST_SYS_WATCHDOG</a> = 44, </div>
<div class="line"><a id="l00094" name="l00094"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a55ccc9b0512b87373e0ebed3bc0a3675">   94</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a55ccc9b0512b87373e0ebed3bc0a3675">CLK_DEST_SYS_XIP</a> = 45, </div>
<div class="line"><a id="l00095" name="l00095"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0afc877f622f554735e90baea698edaf8a">   95</a></span>    <a class="code hl_enumvalue" href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0afc877f622f554735e90baea698edaf8a">CLK_DEST_SYS_XOSC</a> = 46, </div>
<div class="line"><a id="l00096" name="l00096"></a><span class="lineno">   96</span>    NUM_CLOCK_DESTINATIONS</div>
<div class="line"><a id="l00097" name="l00097"></a><span class="lineno"><a class="line" href="group__hardware__clocks.html#ga9191dff316e7d1c4753f6dff2a72ce77">   97</a></span>} <a class="code hl_typedef" href="group__hardware__clocks.html#ga9191dff316e7d1c4753f6dff2a72ce77">clock_dest_num_t</a>;</div>
<div class="line"><a id="l00098" name="l00098"></a><span class="lineno">   98</span> </div>
<div class="line"><a id="l00100" name="l00100"></a><span class="lineno"><a class="line" href="structclock__hw__t.html">  100</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a id="l00101" name="l00101"></a><span class="lineno">  101</span>    _REG_(CLOCKS_CLK_GPOUT0_CTRL_OFFSET) <span class="comment">// CLOCKS_CLK_GPOUT0_CTRL</span></div>
<div class="line"><a id="l00102" name="l00102"></a><span class="lineno">  102</span>    <span class="comment">// Clock control, can be changed on-the-fly (except for auxsrc)</span></div>
<div class="line"><a id="l00103" name="l00103"></a><span class="lineno">  103</span>    <span class="comment">// 0x00100000 [20]    NUDGE        (0) An edge on this signal shifts the phase of the output by...</span></div>
<div class="line"><a id="l00104" name="l00104"></a><span class="lineno">  104</span>    <span class="comment">// 0x00030000 [17:16] PHASE        (0x0) This delays the enable signal by up to 3 cycles of the...</span></div>
<div class="line"><a id="l00105" name="l00105"></a><span class="lineno">  105</span>    <span class="comment">// 0x00001000 [12]    DC50         (0) Enables duty cycle correction for odd divisors</span></div>
<div class="line"><a id="l00106" name="l00106"></a><span class="lineno">  106</span>    <span class="comment">// 0x00000800 [11]    ENABLE       (0) Starts and stops the clock generator cleanly</span></div>
<div class="line"><a id="l00107" name="l00107"></a><span class="lineno">  107</span>    <span class="comment">// 0x00000400 [10]    KILL         (0) Asynchronously kills the clock generator</span></div>
<div class="line"><a id="l00108" name="l00108"></a><span class="lineno">  108</span>    <span class="comment">// 0x000001e0 [8:5]   AUXSRC       (0x0) Selects the auxiliary clock source, will glitch when switching</span></div>
<div class="line"><a id="l00109" name="l00109"></a><span class="lineno">  109</span>    io_rw_32 ctrl;</div>
<div class="line"><a id="l00110" name="l00110"></a><span class="lineno">  110</span> </div>
<div class="line"><a id="l00111" name="l00111"></a><span class="lineno">  111</span>    _REG_(CLOCKS_CLK_GPOUT0_DIV_OFFSET) <span class="comment">// CLOCKS_CLK_GPOUT0_DIV</span></div>
<div class="line"><a id="l00112" name="l00112"></a><span class="lineno">  112</span>    <span class="comment">// Clock divisor, can be changed on-the-fly</span></div>
<div class="line"><a id="l00113" name="l00113"></a><span class="lineno">  113</span>    <span class="comment">// 0xffffff00 [31:8]  INT          (0x000001) Integer component of the divisor, 0 -&gt; divide by 2^16</span></div>
<div class="line"><a id="l00114" name="l00114"></a><span class="lineno">  114</span>    <span class="comment">// 0x000000ff [7:0]   FRAC         (0x00) Fractional component of the divisor</span></div>
<div class="line"><a id="l00115" name="l00115"></a><span class="lineno">  115</span>    io_rw_32 div;</div>
<div class="line"><a id="l00116" name="l00116"></a><span class="lineno">  116</span> </div>
<div class="line"><a id="l00117" name="l00117"></a><span class="lineno">  117</span>    _REG_(CLOCKS_CLK_GPOUT0_SELECTED_OFFSET) <span class="comment">// CLOCKS_CLK_GPOUT0_SELECTED</span></div>
<div class="line"><a id="l00118" name="l00118"></a><span class="lineno">  118</span>    <span class="comment">// Indicates which SRC is currently selected by the glitchless mux (one-hot)</span></div>
<div class="line"><a id="l00119" name="l00119"></a><span class="lineno">  119</span>    <span class="comment">// 0xffffffff [31:0]  CLK_GPOUT0_SELECTED (0x00000001) This slice does not have a glitchless mux (only the...</span></div>
<div class="line"><a id="l00120" name="l00120"></a><span class="lineno">  120</span>    io_ro_32 selected;</div>
<div class="line"><a id="l00121" name="l00121"></a><span class="lineno">  121</span>} <a class="code hl_struct" href="structclock__hw__t.html">clock_hw_t</a>;</div>
<div class="line"><a id="l00123" name="l00123"></a><span class="lineno">  123</span> </div>
<div class="line"><a id="l00124" name="l00124"></a><span class="lineno"><a class="line" href="structclock__resus__hw__t.html">  124</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a id="l00125" name="l00125"></a><span class="lineno">  125</span>    _REG_(CLOCKS_CLK_SYS_RESUS_CTRL_OFFSET) <span class="comment">// CLOCKS_CLK_SYS_RESUS_CTRL</span></div>
<div class="line"><a id="l00126" name="l00126"></a><span class="lineno">  126</span>    <span class="comment">// 0x00010000 [16]    CLEAR        (0) For clearing the resus after the fault that triggered it...</span></div>
<div class="line"><a id="l00127" name="l00127"></a><span class="lineno">  127</span>    <span class="comment">// 0x00001000 [12]    FRCE         (0) Force a resus, for test purposes only</span></div>
<div class="line"><a id="l00128" name="l00128"></a><span class="lineno">  128</span>    <span class="comment">// 0x00000100 [8]     ENABLE       (0) Enable resus</span></div>
<div class="line"><a id="l00129" name="l00129"></a><span class="lineno">  129</span>    <span class="comment">// 0x000000ff [7:0]   TIMEOUT      (0xff) This is expressed as a number of clk_ref cycles +</span></div>
<div class="line"><a id="l00130" name="l00130"></a><span class="lineno">  130</span>    io_rw_32 ctrl;</div>
<div class="line"><a id="l00131" name="l00131"></a><span class="lineno">  131</span> </div>
<div class="line"><a id="l00132" name="l00132"></a><span class="lineno">  132</span>    _REG_(CLOCKS_CLK_SYS_RESUS_STATUS_OFFSET) <span class="comment">// CLOCKS_CLK_SYS_RESUS_STATUS</span></div>
<div class="line"><a id="l00133" name="l00133"></a><span class="lineno">  133</span>    <span class="comment">// 0x00000001 [0]     RESUSSED     (0) Clock has been resuscitated, correct the error then send...</span></div>
<div class="line"><a id="l00134" name="l00134"></a><span class="lineno">  134</span>    io_ro_32 status;</div>
<div class="line"><a id="l00135" name="l00135"></a><span class="lineno">  135</span>} <a class="code hl_struct" href="structclock__resus__hw__t.html">clock_resus_hw_t</a>;</div>
<div class="line"><a id="l00136" name="l00136"></a><span class="lineno">  136</span> </div>
<div class="line"><a id="l00137" name="l00137"></a><span class="lineno"><a class="line" href="structfc__hw__t.html">  137</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a id="l00138" name="l00138"></a><span class="lineno">  138</span>    _REG_(CLOCKS_FC0_REF_KHZ_OFFSET) <span class="comment">// CLOCKS_FC0_REF_KHZ</span></div>
<div class="line"><a id="l00139" name="l00139"></a><span class="lineno">  139</span>    <span class="comment">// Reference clock frequency in kHz</span></div>
<div class="line"><a id="l00140" name="l00140"></a><span class="lineno">  140</span>    <span class="comment">// 0x000fffff [19:0]  FC0_REF_KHZ  (0x00000) </span></div>
<div class="line"><a id="l00141" name="l00141"></a><span class="lineno">  141</span>    io_rw_32 ref_khz;</div>
<div class="line"><a id="l00142" name="l00142"></a><span class="lineno">  142</span> </div>
<div class="line"><a id="l00143" name="l00143"></a><span class="lineno">  143</span>    _REG_(CLOCKS_FC0_MIN_KHZ_OFFSET) <span class="comment">// CLOCKS_FC0_MIN_KHZ</span></div>
<div class="line"><a id="l00144" name="l00144"></a><span class="lineno">  144</span>    <span class="comment">// Minimum pass frequency in kHz</span></div>
<div class="line"><a id="l00145" name="l00145"></a><span class="lineno">  145</span>    <span class="comment">// 0x01ffffff [24:0]  FC0_MIN_KHZ  (0x0000000) </span></div>
<div class="line"><a id="l00146" name="l00146"></a><span class="lineno">  146</span>    io_rw_32 min_khz;</div>
<div class="line"><a id="l00147" name="l00147"></a><span class="lineno">  147</span> </div>
<div class="line"><a id="l00148" name="l00148"></a><span class="lineno">  148</span>    _REG_(CLOCKS_FC0_MAX_KHZ_OFFSET) <span class="comment">// CLOCKS_FC0_MAX_KHZ</span></div>
<div class="line"><a id="l00149" name="l00149"></a><span class="lineno">  149</span>    <span class="comment">// Maximum pass frequency in kHz</span></div>
<div class="line"><a id="l00150" name="l00150"></a><span class="lineno">  150</span>    <span class="comment">// 0x01ffffff [24:0]  FC0_MAX_KHZ  (0x1ffffff) </span></div>
<div class="line"><a id="l00151" name="l00151"></a><span class="lineno">  151</span>    io_rw_32 max_khz;</div>
<div class="line"><a id="l00152" name="l00152"></a><span class="lineno">  152</span> </div>
<div class="line"><a id="l00153" name="l00153"></a><span class="lineno">  153</span>    _REG_(CLOCKS_FC0_DELAY_OFFSET) <span class="comment">// CLOCKS_FC0_DELAY</span></div>
<div class="line"><a id="l00154" name="l00154"></a><span class="lineno">  154</span>    <span class="comment">// Delays the start of frequency counting to allow the mux to settle +</span></div>
<div class="line"><a id="l00155" name="l00155"></a><span class="lineno">  155</span>    <span class="comment">// 0x00000007 [2:0]   FC0_DELAY    (0x1) </span></div>
<div class="line"><a id="l00156" name="l00156"></a><span class="lineno">  156</span>    io_rw_32 delay;</div>
<div class="line"><a id="l00157" name="l00157"></a><span class="lineno">  157</span> </div>
<div class="line"><a id="l00158" name="l00158"></a><span class="lineno">  158</span>    _REG_(CLOCKS_FC0_INTERVAL_OFFSET) <span class="comment">// CLOCKS_FC0_INTERVAL</span></div>
<div class="line"><a id="l00159" name="l00159"></a><span class="lineno">  159</span>    <span class="comment">// The test interval is 0</span></div>
<div class="line"><a id="l00160" name="l00160"></a><span class="lineno">  160</span>    <span class="comment">// 0x0000000f [3:0]   FC0_INTERVAL (0x8) </span></div>
<div class="line"><a id="l00161" name="l00161"></a><span class="lineno">  161</span>    io_rw_32 interval;</div>
<div class="line"><a id="l00162" name="l00162"></a><span class="lineno">  162</span> </div>
<div class="line"><a id="l00163" name="l00163"></a><span class="lineno">  163</span>    _REG_(CLOCKS_FC0_SRC_OFFSET) <span class="comment">// CLOCKS_FC0_SRC</span></div>
<div class="line"><a id="l00164" name="l00164"></a><span class="lineno">  164</span>    <span class="comment">// Clock sent to frequency counter, set to 0 when not required +</span></div>
<div class="line"><a id="l00165" name="l00165"></a><span class="lineno">  165</span>    <span class="comment">// 0x000000ff [7:0]   FC0_SRC      (0x00) </span></div>
<div class="line"><a id="l00166" name="l00166"></a><span class="lineno">  166</span>    io_rw_32 src;</div>
<div class="line"><a id="l00167" name="l00167"></a><span class="lineno">  167</span> </div>
<div class="line"><a id="l00168" name="l00168"></a><span class="lineno">  168</span>    _REG_(CLOCKS_FC0_STATUS_OFFSET) <span class="comment">// CLOCKS_FC0_STATUS</span></div>
<div class="line"><a id="l00169" name="l00169"></a><span class="lineno">  169</span>    <span class="comment">// Frequency counter status</span></div>
<div class="line"><a id="l00170" name="l00170"></a><span class="lineno">  170</span>    <span class="comment">// 0x10000000 [28]    DIED         (0) Test clock stopped during test</span></div>
<div class="line"><a id="l00171" name="l00171"></a><span class="lineno">  171</span>    <span class="comment">// 0x01000000 [24]    FAST         (0) Test clock faster than expected, only valid when status_done=1</span></div>
<div class="line"><a id="l00172" name="l00172"></a><span class="lineno">  172</span>    <span class="comment">// 0x00100000 [20]    SLOW         (0) Test clock slower than expected, only valid when status_done=1</span></div>
<div class="line"><a id="l00173" name="l00173"></a><span class="lineno">  173</span>    <span class="comment">// 0x00010000 [16]    FAIL         (0) Test failed</span></div>
<div class="line"><a id="l00174" name="l00174"></a><span class="lineno">  174</span>    <span class="comment">// 0x00001000 [12]    WAITING      (0) Waiting for test clock to start</span></div>
<div class="line"><a id="l00175" name="l00175"></a><span class="lineno">  175</span>    <span class="comment">// 0x00000100 [8]     RUNNING      (0) Test running</span></div>
<div class="line"><a id="l00176" name="l00176"></a><span class="lineno">  176</span>    <span class="comment">// 0x00000010 [4]     DONE         (0) Test complete</span></div>
<div class="line"><a id="l00177" name="l00177"></a><span class="lineno">  177</span>    <span class="comment">// 0x00000001 [0]     PASS         (0) Test passed</span></div>
<div class="line"><a id="l00178" name="l00178"></a><span class="lineno">  178</span>    io_ro_32 status;</div>
<div class="line"><a id="l00179" name="l00179"></a><span class="lineno">  179</span> </div>
<div class="line"><a id="l00180" name="l00180"></a><span class="lineno">  180</span>    _REG_(CLOCKS_FC0_RESULT_OFFSET) <span class="comment">// CLOCKS_FC0_RESULT</span></div>
<div class="line"><a id="l00181" name="l00181"></a><span class="lineno">  181</span>    <span class="comment">// Result of frequency measurement, only valid when status_done=1</span></div>
<div class="line"><a id="l00182" name="l00182"></a><span class="lineno">  182</span>    <span class="comment">// 0x3fffffe0 [29:5]  KHZ          (0x0000000) </span></div>
<div class="line"><a id="l00183" name="l00183"></a><span class="lineno">  183</span>    <span class="comment">// 0x0000001f [4:0]   FRAC         (0x00) </span></div>
<div class="line"><a id="l00184" name="l00184"></a><span class="lineno">  184</span>    io_ro_32 result;</div>
<div class="line"><a id="l00185" name="l00185"></a><span class="lineno">  185</span>} <a class="code hl_struct" href="structfc__hw__t.html">fc_hw_t</a>;</div>
<div class="line"><a id="l00186" name="l00186"></a><span class="lineno">  186</span> </div>
<div class="line"><a id="l00187" name="l00187"></a><span class="lineno"><a class="line" href="structclocks__hw__t.html">  187</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a id="l00188" name="l00188"></a><span class="lineno">  188</span>    <a class="code hl_struct" href="structclock__hw__t.html">clock_hw_t</a> clk[10];</div>
<div class="line"><a id="l00189" name="l00189"></a><span class="lineno">  189</span> </div>
<div class="line"><a id="l00190" name="l00190"></a><span class="lineno">  190</span>    <a class="code hl_struct" href="structclock__resus__hw__t.html">clock_resus_hw_t</a> resus;</div>
<div class="line"><a id="l00191" name="l00191"></a><span class="lineno">  191</span> </div>
<div class="line"><a id="l00192" name="l00192"></a><span class="lineno">  192</span>    <a class="code hl_struct" href="structfc__hw__t.html">fc_hw_t</a> fc0;</div>
<div class="line"><a id="l00193" name="l00193"></a><span class="lineno">  193</span> </div>
<div class="line"><a id="l00194" name="l00194"></a><span class="lineno">  194</span>    <span class="keyword">union </span>{</div>
<div class="line"><a id="l00195" name="l00195"></a><span class="lineno">  195</span>        <span class="keyword">struct </span>{</div>
<div class="line"><a id="l00196" name="l00196"></a><span class="lineno">  196</span>            _REG_(CLOCKS_WAKE_EN0_OFFSET) <span class="comment">// CLOCKS_WAKE_EN0</span></div>
<div class="line"><a id="l00197" name="l00197"></a><span class="lineno">  197</span>            <span class="comment">// enable clock in wake mode</span></div>
<div class="line"><a id="l00198" name="l00198"></a><span class="lineno">  198</span>            <span class="comment">// 0x80000000 [31]    CLK_SYS_SRAM3 (1) </span></div>
<div class="line"><a id="l00199" name="l00199"></a><span class="lineno">  199</span>            <span class="comment">// 0x40000000 [30]    CLK_SYS_SRAM2 (1) </span></div>
<div class="line"><a id="l00200" name="l00200"></a><span class="lineno">  200</span>            <span class="comment">// 0x20000000 [29]    CLK_SYS_SRAM1 (1) </span></div>
<div class="line"><a id="l00201" name="l00201"></a><span class="lineno">  201</span>            <span class="comment">// 0x10000000 [28]    CLK_SYS_SRAM0 (1) </span></div>
<div class="line"><a id="l00202" name="l00202"></a><span class="lineno">  202</span>            <span class="comment">// 0x08000000 [27]    CLK_SYS_SPI1 (1) </span></div>
<div class="line"><a id="l00203" name="l00203"></a><span class="lineno">  203</span>            <span class="comment">// 0x04000000 [26]    CLK_PERI_SPI1 (1) </span></div>
<div class="line"><a id="l00204" name="l00204"></a><span class="lineno">  204</span>            <span class="comment">// 0x02000000 [25]    CLK_SYS_SPI0 (1) </span></div>
<div class="line"><a id="l00205" name="l00205"></a><span class="lineno">  205</span>            <span class="comment">// 0x01000000 [24]    CLK_PERI_SPI0 (1) </span></div>
<div class="line"><a id="l00206" name="l00206"></a><span class="lineno">  206</span>            <span class="comment">// 0x00800000 [23]    CLK_SYS_SIOB (1) </span></div>
<div class="line"><a id="l00207" name="l00207"></a><span class="lineno">  207</span>            <span class="comment">// 0x00400000 [22]    CLK_SYS_RTC  (1) </span></div>
<div class="line"><a id="l00208" name="l00208"></a><span class="lineno">  208</span>            <span class="comment">// 0x00200000 [21]    CLK_RTC_RTC  (1) </span></div>
<div class="line"><a id="l00209" name="l00209"></a><span class="lineno">  209</span>            <span class="comment">// 0x00100000 [20]    CLK_SYS_ROSC (1) </span></div>
<div class="line"><a id="l00210" name="l00210"></a><span class="lineno">  210</span>            <span class="comment">// 0x00080000 [19]    CLK_SYS_ROM  (1) </span></div>
<div class="line"><a id="l00211" name="l00211"></a><span class="lineno">  211</span>            <span class="comment">// 0x00040000 [18]    CLK_SYS_RESETS (1) </span></div>
<div class="line"><a id="l00212" name="l00212"></a><span class="lineno">  212</span>            <span class="comment">// 0x00020000 [17]    CLK_SYS_PWM  (1) </span></div>
<div class="line"><a id="l00213" name="l00213"></a><span class="lineno">  213</span>            <span class="comment">// 0x00010000 [16]    CLK_SYS_POWER (1) </span></div>
<div class="line"><a id="l00214" name="l00214"></a><span class="lineno">  214</span>            <span class="comment">// 0x00008000 [15]    CLK_SYS_PLL_USB (1) </span></div>
<div class="line"><a id="l00215" name="l00215"></a><span class="lineno">  215</span>            <span class="comment">// 0x00004000 [14]    CLK_SYS_PLL_SYS (1) </span></div>
<div class="line"><a id="l00216" name="l00216"></a><span class="lineno">  216</span>            <span class="comment">// 0x00002000 [13]    CLK_SYS_PIO1 (1) </span></div>
<div class="line"><a id="l00217" name="l00217"></a><span class="lineno">  217</span>            <span class="comment">// 0x00001000 [12]    CLK_SYS_PIO0 (1) </span></div>
<div class="line"><a id="l00218" name="l00218"></a><span class="lineno">  218</span>            <span class="comment">// 0x00000800 [11]    CLK_SYS_PADS (1) </span></div>
<div class="line"><a id="l00219" name="l00219"></a><span class="lineno">  219</span>            <span class="comment">// 0x00000400 [10]    CLK_SYS_LDO_POR (1) </span></div>
<div class="line"><a id="l00220" name="l00220"></a><span class="lineno">  220</span>            <span class="comment">// 0x00000200 [9]     CLK_SYS_JTAG (1) </span></div>
<div class="line"><a id="l00221" name="l00221"></a><span class="lineno">  221</span>            <span class="comment">// 0x00000100 [8]     CLK_SYS_IO   (1) </span></div>
<div class="line"><a id="l00222" name="l00222"></a><span class="lineno">  222</span>            <span class="comment">// 0x00000080 [7]     CLK_SYS_I2C1 (1) </span></div>
<div class="line"><a id="l00223" name="l00223"></a><span class="lineno">  223</span>            <span class="comment">// 0x00000040 [6]     CLK_SYS_I2C0 (1) </span></div>
<div class="line"><a id="l00224" name="l00224"></a><span class="lineno">  224</span>            <span class="comment">// 0x00000020 [5]     CLK_SYS_DMA  (1) </span></div>
<div class="line"><a id="l00225" name="l00225"></a><span class="lineno">  225</span>            <span class="comment">// 0x00000010 [4]     CLK_SYS_BUSFABRIC (1) </span></div>
<div class="line"><a id="l00226" name="l00226"></a><span class="lineno">  226</span>            <span class="comment">// 0x00000008 [3]     CLK_SYS_BUSCTRL (1) </span></div>
<div class="line"><a id="l00227" name="l00227"></a><span class="lineno">  227</span>            <span class="comment">// 0x00000004 [2]     CLK_SYS_ADC0 (1) </span></div>
<div class="line"><a id="l00228" name="l00228"></a><span class="lineno">  228</span>            <span class="comment">// 0x00000002 [1]     CLK_ADC_ADC0 (1) </span></div>
<div class="line"><a id="l00229" name="l00229"></a><span class="lineno">  229</span>            <span class="comment">// 0x00000001 [0]     CLK_SYS_CLOCKS_BANK_DEFAULT (1) </span></div>
<div class="line"><a id="l00230" name="l00230"></a><span class="lineno">  230</span>            io_rw_32 wake_en0; </div>
<div class="line"><a id="l00231" name="l00231"></a><span class="lineno">  231</span> </div>
<div class="line"><a id="l00232" name="l00232"></a><span class="lineno">  232</span>            _REG_(CLOCKS_WAKE_EN1_OFFSET) <span class="comment">// CLOCKS_WAKE_EN1</span></div>
<div class="line"><a id="l00233" name="l00233"></a><span class="lineno">  233</span>            <span class="comment">// enable clock in wake mode</span></div>
<div class="line"><a id="l00234" name="l00234"></a><span class="lineno">  234</span>            <span class="comment">// 0x00004000 [14]    CLK_SYS_XOSC (1) </span></div>
<div class="line"><a id="l00235" name="l00235"></a><span class="lineno">  235</span>            <span class="comment">// 0x00002000 [13]    CLK_SYS_XIP  (1) </span></div>
<div class="line"><a id="l00236" name="l00236"></a><span class="lineno">  236</span>            <span class="comment">// 0x00001000 [12]    CLK_SYS_WATCHDOG (1) </span></div>
<div class="line"><a id="l00237" name="l00237"></a><span class="lineno">  237</span>            <span class="comment">// 0x00000800 [11]    CLK_USB_USBCTRL (1) </span></div>
<div class="line"><a id="l00238" name="l00238"></a><span class="lineno">  238</span>            <span class="comment">// 0x00000400 [10]    CLK_SYS_USBCTRL (1) </span></div>
<div class="line"><a id="l00239" name="l00239"></a><span class="lineno">  239</span>            <span class="comment">// 0x00000200 [9]     CLK_SYS_UART1 (1) </span></div>
<div class="line"><a id="l00240" name="l00240"></a><span class="lineno">  240</span>            <span class="comment">// 0x00000100 [8]     CLK_PERI_UART1 (1) </span></div>
<div class="line"><a id="l00241" name="l00241"></a><span class="lineno">  241</span>            <span class="comment">// 0x00000080 [7]     CLK_SYS_UART0 (1) </span></div>
<div class="line"><a id="l00242" name="l00242"></a><span class="lineno">  242</span>            <span class="comment">// 0x00000040 [6]     CLK_PERI_UART0 (1) </span></div>
<div class="line"><a id="l00243" name="l00243"></a><span class="lineno">  243</span>            <span class="comment">// 0x00000020 [5]     CLK_SYS_TIMER (1) </span></div>
<div class="line"><a id="l00244" name="l00244"></a><span class="lineno">  244</span>            <span class="comment">// 0x00000010 [4]     CLK_SYS_TBMAN (1) </span></div>
<div class="line"><a id="l00245" name="l00245"></a><span class="lineno">  245</span>            <span class="comment">// 0x00000008 [3]     CLK_SYS_SYSINFO (1) </span></div>
<div class="line"><a id="l00246" name="l00246"></a><span class="lineno">  246</span>            <span class="comment">// 0x00000004 [2]     CLK_SYS_SYSCFG (1) </span></div>
<div class="line"><a id="l00247" name="l00247"></a><span class="lineno">  247</span>            <span class="comment">// 0x00000002 [1]     CLK_SYS_SRAM5 (1) </span></div>
<div class="line"><a id="l00248" name="l00248"></a><span class="lineno">  248</span>            <span class="comment">// 0x00000001 [0]     CLK_SYS_SRAM4 (1) </span></div>
<div class="line"><a id="l00249" name="l00249"></a><span class="lineno">  249</span>            io_rw_32 wake_en1; </div>
<div class="line"><a id="l00250" name="l00250"></a><span class="lineno">  250</span>        };</div>
<div class="line"><a id="l00251" name="l00251"></a><span class="lineno">  251</span>        <span class="comment">// (Description copied from array index 0 register CLOCKS_WAKE_EN0 applies similarly to other array indexes)</span></div>
<div class="line"><a id="l00252" name="l00252"></a><span class="lineno">  252</span>        _REG_(CLOCKS_WAKE_EN0_OFFSET) <span class="comment">// CLOCKS_WAKE_EN0</span></div>
<div class="line"><a id="l00253" name="l00253"></a><span class="lineno">  253</span>        <span class="comment">// enable clock in wake mode</span></div>
<div class="line"><a id="l00254" name="l00254"></a><span class="lineno">  254</span>        <span class="comment">// 0x80000000 [31]    CLK_SYS_SRAM3 (1) </span></div>
<div class="line"><a id="l00255" name="l00255"></a><span class="lineno">  255</span>        <span class="comment">// 0x40000000 [30]    CLK_SYS_SRAM2 (1) </span></div>
<div class="line"><a id="l00256" name="l00256"></a><span class="lineno">  256</span>        <span class="comment">// 0x20000000 [29]    CLK_SYS_SRAM1 (1) </span></div>
<div class="line"><a id="l00257" name="l00257"></a><span class="lineno">  257</span>        <span class="comment">// 0x10000000 [28]    CLK_SYS_SRAM0 (1) </span></div>
<div class="line"><a id="l00258" name="l00258"></a><span class="lineno">  258</span>        <span class="comment">// 0x08000000 [27]    CLK_SYS_SPI1 (1) </span></div>
<div class="line"><a id="l00259" name="l00259"></a><span class="lineno">  259</span>        <span class="comment">// 0x04000000 [26]    CLK_PERI_SPI1 (1) </span></div>
<div class="line"><a id="l00260" name="l00260"></a><span class="lineno">  260</span>        <span class="comment">// 0x02000000 [25]    CLK_SYS_SPI0 (1) </span></div>
<div class="line"><a id="l00261" name="l00261"></a><span class="lineno">  261</span>        <span class="comment">// 0x01000000 [24]    CLK_PERI_SPI0 (1) </span></div>
<div class="line"><a id="l00262" name="l00262"></a><span class="lineno">  262</span>        <span class="comment">// 0x00800000 [23]    CLK_SYS_SIO  (1) </span></div>
<div class="line"><a id="l00263" name="l00263"></a><span class="lineno">  263</span>        <span class="comment">// 0x00400000 [22]    CLK_SYS_RTC  (1) </span></div>
<div class="line"><a id="l00264" name="l00264"></a><span class="lineno">  264</span>        <span class="comment">// 0x00200000 [21]    CLK_RTC_RTC  (1) </span></div>
<div class="line"><a id="l00265" name="l00265"></a><span class="lineno">  265</span>        <span class="comment">// 0x00100000 [20]    CLK_SYS_ROSC (1) </span></div>
<div class="line"><a id="l00266" name="l00266"></a><span class="lineno">  266</span>        <span class="comment">// 0x00080000 [19]    CLK_SYS_ROM  (1) </span></div>
<div class="line"><a id="l00267" name="l00267"></a><span class="lineno">  267</span>        <span class="comment">// 0x00040000 [18]    CLK_SYS_RESETS (1) </span></div>
<div class="line"><a id="l00268" name="l00268"></a><span class="lineno">  268</span>        <span class="comment">// 0x00020000 [17]    CLK_SYS_PWM  (1) </span></div>
<div class="line"><a id="l00269" name="l00269"></a><span class="lineno">  269</span>        <span class="comment">// 0x00010000 [16]    CLK_SYS_PSM  (1) </span></div>
<div class="line"><a id="l00270" name="l00270"></a><span class="lineno">  270</span>        <span class="comment">// 0x00008000 [15]    CLK_SYS_PLL_USB (1) </span></div>
<div class="line"><a id="l00271" name="l00271"></a><span class="lineno">  271</span>        <span class="comment">// 0x00004000 [14]    CLK_SYS_PLL_SYS (1) </span></div>
<div class="line"><a id="l00272" name="l00272"></a><span class="lineno">  272</span>        <span class="comment">// 0x00002000 [13]    CLK_SYS_PIO1 (1) </span></div>
<div class="line"><a id="l00273" name="l00273"></a><span class="lineno">  273</span>        <span class="comment">// 0x00001000 [12]    CLK_SYS_PIO0 (1) </span></div>
<div class="line"><a id="l00274" name="l00274"></a><span class="lineno">  274</span>        <span class="comment">// 0x00000800 [11]    CLK_SYS_PADS (1) </span></div>
<div class="line"><a id="l00275" name="l00275"></a><span class="lineno">  275</span>        <span class="comment">// 0x00000400 [10]    CLK_SYS_VREG_AND_CHIP_RESET (1) </span></div>
<div class="line"><a id="l00276" name="l00276"></a><span class="lineno">  276</span>        <span class="comment">// 0x00000200 [9]     CLK_SYS_JTAG (1) </span></div>
<div class="line"><a id="l00277" name="l00277"></a><span class="lineno">  277</span>        <span class="comment">// 0x00000100 [8]     CLK_SYS_IO   (1) </span></div>
<div class="line"><a id="l00278" name="l00278"></a><span class="lineno">  278</span>        <span class="comment">// 0x00000080 [7]     CLK_SYS_I2C1 (1) </span></div>
<div class="line"><a id="l00279" name="l00279"></a><span class="lineno">  279</span>        <span class="comment">// 0x00000040 [6]     CLK_SYS_I2C0 (1) </span></div>
<div class="line"><a id="l00280" name="l00280"></a><span class="lineno">  280</span>        <span class="comment">// 0x00000020 [5]     CLK_SYS_DMA  (1) </span></div>
<div class="line"><a id="l00281" name="l00281"></a><span class="lineno">  281</span>        <span class="comment">// 0x00000010 [4]     CLK_SYS_BUSFABRIC (1) </span></div>
<div class="line"><a id="l00282" name="l00282"></a><span class="lineno">  282</span>        <span class="comment">// 0x00000008 [3]     CLK_SYS_BUSCTRL (1) </span></div>
<div class="line"><a id="l00283" name="l00283"></a><span class="lineno">  283</span>        <span class="comment">// 0x00000004 [2]     CLK_SYS_ADC  (1) </span></div>
<div class="line"><a id="l00284" name="l00284"></a><span class="lineno">  284</span>        <span class="comment">// 0x00000002 [1]     CLK_ADC_ADC  (1) </span></div>
<div class="line"><a id="l00285" name="l00285"></a><span class="lineno">  285</span>        <span class="comment">// 0x00000001 [0]     CLK_SYS_CLOCKS (1) </span></div>
<div class="line"><a id="l00286" name="l00286"></a><span class="lineno">  286</span>        io_rw_32 wake_en[2];</div>
<div class="line"><a id="l00287" name="l00287"></a><span class="lineno">  287</span>    };</div>
<div class="line"><a id="l00288" name="l00288"></a><span class="lineno">  288</span> </div>
<div class="line"><a id="l00289" name="l00289"></a><span class="lineno">  289</span>    <span class="keyword">union </span>{</div>
<div class="line"><a id="l00290" name="l00290"></a><span class="lineno">  290</span>        <span class="keyword">struct </span>{</div>
<div class="line"><a id="l00291" name="l00291"></a><span class="lineno">  291</span>            _REG_(CLOCKS_SLEEP_EN0_OFFSET) <span class="comment">// CLOCKS_SLEEP_EN0</span></div>
<div class="line"><a id="l00292" name="l00292"></a><span class="lineno">  292</span>            <span class="comment">// enable clock in sleep mode</span></div>
<div class="line"><a id="l00293" name="l00293"></a><span class="lineno">  293</span>            <span class="comment">// 0x80000000 [31]    CLK_SYS_SRAM3 (1) </span></div>
<div class="line"><a id="l00294" name="l00294"></a><span class="lineno">  294</span>            <span class="comment">// 0x40000000 [30]    CLK_SYS_SRAM2 (1) </span></div>
<div class="line"><a id="l00295" name="l00295"></a><span class="lineno">  295</span>            <span class="comment">// 0x20000000 [29]    CLK_SYS_SRAM1 (1) </span></div>
<div class="line"><a id="l00296" name="l00296"></a><span class="lineno">  296</span>            <span class="comment">// 0x10000000 [28]    CLK_SYS_SRAM0 (1) </span></div>
<div class="line"><a id="l00297" name="l00297"></a><span class="lineno">  297</span>            <span class="comment">// 0x08000000 [27]    CLK_SYS_SPI1 (1) </span></div>
<div class="line"><a id="l00298" name="l00298"></a><span class="lineno">  298</span>            <span class="comment">// 0x04000000 [26]    CLK_PERI_SPI1 (1) </span></div>
<div class="line"><a id="l00299" name="l00299"></a><span class="lineno">  299</span>            <span class="comment">// 0x02000000 [25]    CLK_SYS_SPI0 (1) </span></div>
<div class="line"><a id="l00300" name="l00300"></a><span class="lineno">  300</span>            <span class="comment">// 0x01000000 [24]    CLK_PERI_SPI0 (1) </span></div>
<div class="line"><a id="l00301" name="l00301"></a><span class="lineno">  301</span>            <span class="comment">// 0x00800000 [23]    CLK_SYS_SIOB (1) </span></div>
<div class="line"><a id="l00302" name="l00302"></a><span class="lineno">  302</span>            <span class="comment">// 0x00400000 [22]    CLK_SYS_RTC  (1) </span></div>
<div class="line"><a id="l00303" name="l00303"></a><span class="lineno">  303</span>            <span class="comment">// 0x00200000 [21]    CLK_RTC_RTC  (1) </span></div>
<div class="line"><a id="l00304" name="l00304"></a><span class="lineno">  304</span>            <span class="comment">// 0x00100000 [20]    CLK_SYS_ROSC (1) </span></div>
<div class="line"><a id="l00305" name="l00305"></a><span class="lineno">  305</span>            <span class="comment">// 0x00080000 [19]    CLK_SYS_ROM  (1) </span></div>
<div class="line"><a id="l00306" name="l00306"></a><span class="lineno">  306</span>            <span class="comment">// 0x00040000 [18]    CLK_SYS_RESETS (1) </span></div>
<div class="line"><a id="l00307" name="l00307"></a><span class="lineno">  307</span>            <span class="comment">// 0x00020000 [17]    CLK_SYS_PWM  (1) </span></div>
<div class="line"><a id="l00308" name="l00308"></a><span class="lineno">  308</span>            <span class="comment">// 0x00010000 [16]    CLK_SYS_POWER (1) </span></div>
<div class="line"><a id="l00309" name="l00309"></a><span class="lineno">  309</span>            <span class="comment">// 0x00008000 [15]    CLK_SYS_PLL_USB (1) </span></div>
<div class="line"><a id="l00310" name="l00310"></a><span class="lineno">  310</span>            <span class="comment">// 0x00004000 [14]    CLK_SYS_PLL_SYS (1) </span></div>
<div class="line"><a id="l00311" name="l00311"></a><span class="lineno">  311</span>            <span class="comment">// 0x00002000 [13]    CLK_SYS_PIO1 (1) </span></div>
<div class="line"><a id="l00312" name="l00312"></a><span class="lineno">  312</span>            <span class="comment">// 0x00001000 [12]    CLK_SYS_PIO0 (1) </span></div>
<div class="line"><a id="l00313" name="l00313"></a><span class="lineno">  313</span>            <span class="comment">// 0x00000800 [11]    CLK_SYS_PADS (1) </span></div>
<div class="line"><a id="l00314" name="l00314"></a><span class="lineno">  314</span>            <span class="comment">// 0x00000400 [10]    CLK_SYS_LDO_POR (1) </span></div>
<div class="line"><a id="l00315" name="l00315"></a><span class="lineno">  315</span>            <span class="comment">// 0x00000200 [9]     CLK_SYS_JTAG (1) </span></div>
<div class="line"><a id="l00316" name="l00316"></a><span class="lineno">  316</span>            <span class="comment">// 0x00000100 [8]     CLK_SYS_IO   (1) </span></div>
<div class="line"><a id="l00317" name="l00317"></a><span class="lineno">  317</span>            <span class="comment">// 0x00000080 [7]     CLK_SYS_I2C1 (1) </span></div>
<div class="line"><a id="l00318" name="l00318"></a><span class="lineno">  318</span>            <span class="comment">// 0x00000040 [6]     CLK_SYS_I2C0 (1) </span></div>
<div class="line"><a id="l00319" name="l00319"></a><span class="lineno">  319</span>            <span class="comment">// 0x00000020 [5]     CLK_SYS_DMA  (1) </span></div>
<div class="line"><a id="l00320" name="l00320"></a><span class="lineno">  320</span>            <span class="comment">// 0x00000010 [4]     CLK_SYS_BUSFABRIC (1) </span></div>
<div class="line"><a id="l00321" name="l00321"></a><span class="lineno">  321</span>            <span class="comment">// 0x00000008 [3]     CLK_SYS_BUSCTRL (1) </span></div>
<div class="line"><a id="l00322" name="l00322"></a><span class="lineno">  322</span>            <span class="comment">// 0x00000004 [2]     CLK_SYS_ADC0 (1) </span></div>
<div class="line"><a id="l00323" name="l00323"></a><span class="lineno">  323</span>            <span class="comment">// 0x00000002 [1]     CLK_ADC_ADC0 (1) </span></div>
<div class="line"><a id="l00324" name="l00324"></a><span class="lineno">  324</span>            <span class="comment">// 0x00000001 [0]     CLK_SYS_CLOCKS_BANK_DEFAULT (1) </span></div>
<div class="line"><a id="l00325" name="l00325"></a><span class="lineno">  325</span>            io_rw_32 sleep_en0; </div>
<div class="line"><a id="l00326" name="l00326"></a><span class="lineno">  326</span> </div>
<div class="line"><a id="l00327" name="l00327"></a><span class="lineno">  327</span>            _REG_(CLOCKS_SLEEP_EN1_OFFSET) <span class="comment">// CLOCKS_SLEEP_EN1</span></div>
<div class="line"><a id="l00328" name="l00328"></a><span class="lineno">  328</span>            <span class="comment">// enable clock in sleep mode</span></div>
<div class="line"><a id="l00329" name="l00329"></a><span class="lineno">  329</span>            <span class="comment">// 0x00004000 [14]    CLK_SYS_XOSC (1) </span></div>
<div class="line"><a id="l00330" name="l00330"></a><span class="lineno">  330</span>            <span class="comment">// 0x00002000 [13]    CLK_SYS_XIP  (1) </span></div>
<div class="line"><a id="l00331" name="l00331"></a><span class="lineno">  331</span>            <span class="comment">// 0x00001000 [12]    CLK_SYS_WATCHDOG (1) </span></div>
<div class="line"><a id="l00332" name="l00332"></a><span class="lineno">  332</span>            <span class="comment">// 0x00000800 [11]    CLK_USB_USBCTRL (1) </span></div>
<div class="line"><a id="l00333" name="l00333"></a><span class="lineno">  333</span>            <span class="comment">// 0x00000400 [10]    CLK_SYS_USBCTRL (1) </span></div>
<div class="line"><a id="l00334" name="l00334"></a><span class="lineno">  334</span>            <span class="comment">// 0x00000200 [9]     CLK_SYS_UART1 (1) </span></div>
<div class="line"><a id="l00335" name="l00335"></a><span class="lineno">  335</span>            <span class="comment">// 0x00000100 [8]     CLK_PERI_UART1 (1) </span></div>
<div class="line"><a id="l00336" name="l00336"></a><span class="lineno">  336</span>            <span class="comment">// 0x00000080 [7]     CLK_SYS_UART0 (1) </span></div>
<div class="line"><a id="l00337" name="l00337"></a><span class="lineno">  337</span>            <span class="comment">// 0x00000040 [6]     CLK_PERI_UART0 (1) </span></div>
<div class="line"><a id="l00338" name="l00338"></a><span class="lineno">  338</span>            <span class="comment">// 0x00000020 [5]     CLK_SYS_TIMER (1) </span></div>
<div class="line"><a id="l00339" name="l00339"></a><span class="lineno">  339</span>            <span class="comment">// 0x00000010 [4]     CLK_SYS_TBMAN (1) </span></div>
<div class="line"><a id="l00340" name="l00340"></a><span class="lineno">  340</span>            <span class="comment">// 0x00000008 [3]     CLK_SYS_SYSINFO (1) </span></div>
<div class="line"><a id="l00341" name="l00341"></a><span class="lineno">  341</span>            <span class="comment">// 0x00000004 [2]     CLK_SYS_SYSCFG (1) </span></div>
<div class="line"><a id="l00342" name="l00342"></a><span class="lineno">  342</span>            <span class="comment">// 0x00000002 [1]     CLK_SYS_SRAM5 (1) </span></div>
<div class="line"><a id="l00343" name="l00343"></a><span class="lineno">  343</span>            <span class="comment">// 0x00000001 [0]     CLK_SYS_SRAM4 (1) </span></div>
<div class="line"><a id="l00344" name="l00344"></a><span class="lineno">  344</span>            io_rw_32 sleep_en1; </div>
<div class="line"><a id="l00345" name="l00345"></a><span class="lineno">  345</span>        };</div>
<div class="line"><a id="l00346" name="l00346"></a><span class="lineno">  346</span>        <span class="comment">// (Description copied from array index 0 register CLOCKS_SLEEP_EN0 applies similarly to other array indexes)</span></div>
<div class="line"><a id="l00347" name="l00347"></a><span class="lineno">  347</span>        _REG_(CLOCKS_SLEEP_EN0_OFFSET) <span class="comment">// CLOCKS_SLEEP_EN0</span></div>
<div class="line"><a id="l00348" name="l00348"></a><span class="lineno">  348</span>        <span class="comment">// enable clock in sleep mode</span></div>
<div class="line"><a id="l00349" name="l00349"></a><span class="lineno">  349</span>        <span class="comment">// 0x80000000 [31]    CLK_SYS_SRAM3 (1) </span></div>
<div class="line"><a id="l00350" name="l00350"></a><span class="lineno">  350</span>        <span class="comment">// 0x40000000 [30]    CLK_SYS_SRAM2 (1) </span></div>
<div class="line"><a id="l00351" name="l00351"></a><span class="lineno">  351</span>        <span class="comment">// 0x20000000 [29]    CLK_SYS_SRAM1 (1) </span></div>
<div class="line"><a id="l00352" name="l00352"></a><span class="lineno">  352</span>        <span class="comment">// 0x10000000 [28]    CLK_SYS_SRAM0 (1) </span></div>
<div class="line"><a id="l00353" name="l00353"></a><span class="lineno">  353</span>        <span class="comment">// 0x08000000 [27]    CLK_SYS_SPI1 (1) </span></div>
<div class="line"><a id="l00354" name="l00354"></a><span class="lineno">  354</span>        <span class="comment">// 0x04000000 [26]    CLK_PERI_SPI1 (1) </span></div>
<div class="line"><a id="l00355" name="l00355"></a><span class="lineno">  355</span>        <span class="comment">// 0x02000000 [25]    CLK_SYS_SPI0 (1) </span></div>
<div class="line"><a id="l00356" name="l00356"></a><span class="lineno">  356</span>        <span class="comment">// 0x01000000 [24]    CLK_PERI_SPI0 (1) </span></div>
<div class="line"><a id="l00357" name="l00357"></a><span class="lineno">  357</span>        <span class="comment">// 0x00800000 [23]    CLK_SYS_SIO  (1) </span></div>
<div class="line"><a id="l00358" name="l00358"></a><span class="lineno">  358</span>        <span class="comment">// 0x00400000 [22]    CLK_SYS_RTC  (1) </span></div>
<div class="line"><a id="l00359" name="l00359"></a><span class="lineno">  359</span>        <span class="comment">// 0x00200000 [21]    CLK_RTC_RTC  (1) </span></div>
<div class="line"><a id="l00360" name="l00360"></a><span class="lineno">  360</span>        <span class="comment">// 0x00100000 [20]    CLK_SYS_ROSC (1) </span></div>
<div class="line"><a id="l00361" name="l00361"></a><span class="lineno">  361</span>        <span class="comment">// 0x00080000 [19]    CLK_SYS_ROM  (1) </span></div>
<div class="line"><a id="l00362" name="l00362"></a><span class="lineno">  362</span>        <span class="comment">// 0x00040000 [18]    CLK_SYS_RESETS (1) </span></div>
<div class="line"><a id="l00363" name="l00363"></a><span class="lineno">  363</span>        <span class="comment">// 0x00020000 [17]    CLK_SYS_PWM  (1) </span></div>
<div class="line"><a id="l00364" name="l00364"></a><span class="lineno">  364</span>        <span class="comment">// 0x00010000 [16]    CLK_SYS_PSM  (1) </span></div>
<div class="line"><a id="l00365" name="l00365"></a><span class="lineno">  365</span>        <span class="comment">// 0x00008000 [15]    CLK_SYS_PLL_USB (1) </span></div>
<div class="line"><a id="l00366" name="l00366"></a><span class="lineno">  366</span>        <span class="comment">// 0x00004000 [14]    CLK_SYS_PLL_SYS (1) </span></div>
<div class="line"><a id="l00367" name="l00367"></a><span class="lineno">  367</span>        <span class="comment">// 0x00002000 [13]    CLK_SYS_PIO1 (1) </span></div>
<div class="line"><a id="l00368" name="l00368"></a><span class="lineno">  368</span>        <span class="comment">// 0x00001000 [12]    CLK_SYS_PIO0 (1) </span></div>
<div class="line"><a id="l00369" name="l00369"></a><span class="lineno">  369</span>        <span class="comment">// 0x00000800 [11]    CLK_SYS_PADS (1) </span></div>
<div class="line"><a id="l00370" name="l00370"></a><span class="lineno">  370</span>        <span class="comment">// 0x00000400 [10]    CLK_SYS_VREG_AND_CHIP_RESET (1) </span></div>
<div class="line"><a id="l00371" name="l00371"></a><span class="lineno">  371</span>        <span class="comment">// 0x00000200 [9]     CLK_SYS_JTAG (1) </span></div>
<div class="line"><a id="l00372" name="l00372"></a><span class="lineno">  372</span>        <span class="comment">// 0x00000100 [8]     CLK_SYS_IO   (1) </span></div>
<div class="line"><a id="l00373" name="l00373"></a><span class="lineno">  373</span>        <span class="comment">// 0x00000080 [7]     CLK_SYS_I2C1 (1) </span></div>
<div class="line"><a id="l00374" name="l00374"></a><span class="lineno">  374</span>        <span class="comment">// 0x00000040 [6]     CLK_SYS_I2C0 (1) </span></div>
<div class="line"><a id="l00375" name="l00375"></a><span class="lineno">  375</span>        <span class="comment">// 0x00000020 [5]     CLK_SYS_DMA  (1) </span></div>
<div class="line"><a id="l00376" name="l00376"></a><span class="lineno">  376</span>        <span class="comment">// 0x00000010 [4]     CLK_SYS_BUSFABRIC (1) </span></div>
<div class="line"><a id="l00377" name="l00377"></a><span class="lineno">  377</span>        <span class="comment">// 0x00000008 [3]     CLK_SYS_BUSCTRL (1) </span></div>
<div class="line"><a id="l00378" name="l00378"></a><span class="lineno">  378</span>        <span class="comment">// 0x00000004 [2]     CLK_SYS_ADC  (1) </span></div>
<div class="line"><a id="l00379" name="l00379"></a><span class="lineno">  379</span>        <span class="comment">// 0x00000002 [1]     CLK_ADC_ADC  (1) </span></div>
<div class="line"><a id="l00380" name="l00380"></a><span class="lineno">  380</span>        <span class="comment">// 0x00000001 [0]     CLK_SYS_CLOCKS (1) </span></div>
<div class="line"><a id="l00381" name="l00381"></a><span class="lineno">  381</span>        io_rw_32 sleep_en[2];</div>
<div class="line"><a id="l00382" name="l00382"></a><span class="lineno">  382</span>    };</div>
<div class="line"><a id="l00383" name="l00383"></a><span class="lineno">  383</span> </div>
<div class="line"><a id="l00384" name="l00384"></a><span class="lineno">  384</span>    <span class="keyword">union </span>{</div>
<div class="line"><a id="l00385" name="l00385"></a><span class="lineno">  385</span>        <span class="keyword">struct </span>{</div>
<div class="line"><a id="l00386" name="l00386"></a><span class="lineno">  386</span>            _REG_(CLOCKS_ENABLED0_OFFSET) <span class="comment">// CLOCKS_ENABLED0</span></div>
<div class="line"><a id="l00387" name="l00387"></a><span class="lineno">  387</span>            <span class="comment">// indicates the state of the clock enable</span></div>
<div class="line"><a id="l00388" name="l00388"></a><span class="lineno">  388</span>            <span class="comment">// 0x80000000 [31]    CLK_SYS_SRAM3 (0) </span></div>
<div class="line"><a id="l00389" name="l00389"></a><span class="lineno">  389</span>            <span class="comment">// 0x40000000 [30]    CLK_SYS_SRAM2 (0) </span></div>
<div class="line"><a id="l00390" name="l00390"></a><span class="lineno">  390</span>            <span class="comment">// 0x20000000 [29]    CLK_SYS_SRAM1 (0) </span></div>
<div class="line"><a id="l00391" name="l00391"></a><span class="lineno">  391</span>            <span class="comment">// 0x10000000 [28]    CLK_SYS_SRAM0 (0) </span></div>
<div class="line"><a id="l00392" name="l00392"></a><span class="lineno">  392</span>            <span class="comment">// 0x08000000 [27]    CLK_SYS_SPI1 (0) </span></div>
<div class="line"><a id="l00393" name="l00393"></a><span class="lineno">  393</span>            <span class="comment">// 0x04000000 [26]    CLK_PERI_SPI1 (0) </span></div>
<div class="line"><a id="l00394" name="l00394"></a><span class="lineno">  394</span>            <span class="comment">// 0x02000000 [25]    CLK_SYS_SPI0 (0) </span></div>
<div class="line"><a id="l00395" name="l00395"></a><span class="lineno">  395</span>            <span class="comment">// 0x01000000 [24]    CLK_PERI_SPI0 (0) </span></div>
<div class="line"><a id="l00396" name="l00396"></a><span class="lineno">  396</span>            <span class="comment">// 0x00800000 [23]    CLK_SYS_SIOB (0) </span></div>
<div class="line"><a id="l00397" name="l00397"></a><span class="lineno">  397</span>            <span class="comment">// 0x00400000 [22]    CLK_SYS_RTC  (0) </span></div>
<div class="line"><a id="l00398" name="l00398"></a><span class="lineno">  398</span>            <span class="comment">// 0x00200000 [21]    CLK_RTC_RTC  (0) </span></div>
<div class="line"><a id="l00399" name="l00399"></a><span class="lineno">  399</span>            <span class="comment">// 0x00100000 [20]    CLK_SYS_ROSC (0) </span></div>
<div class="line"><a id="l00400" name="l00400"></a><span class="lineno">  400</span>            <span class="comment">// 0x00080000 [19]    CLK_SYS_ROM  (0) </span></div>
<div class="line"><a id="l00401" name="l00401"></a><span class="lineno">  401</span>            <span class="comment">// 0x00040000 [18]    CLK_SYS_RESETS (0) </span></div>
<div class="line"><a id="l00402" name="l00402"></a><span class="lineno">  402</span>            <span class="comment">// 0x00020000 [17]    CLK_SYS_PWM  (0) </span></div>
<div class="line"><a id="l00403" name="l00403"></a><span class="lineno">  403</span>            <span class="comment">// 0x00010000 [16]    CLK_SYS_POWER (0) </span></div>
<div class="line"><a id="l00404" name="l00404"></a><span class="lineno">  404</span>            <span class="comment">// 0x00008000 [15]    CLK_SYS_PLL_USB (0) </span></div>
<div class="line"><a id="l00405" name="l00405"></a><span class="lineno">  405</span>            <span class="comment">// 0x00004000 [14]    CLK_SYS_PLL_SYS (0) </span></div>
<div class="line"><a id="l00406" name="l00406"></a><span class="lineno">  406</span>            <span class="comment">// 0x00002000 [13]    CLK_SYS_PIO1 (0) </span></div>
<div class="line"><a id="l00407" name="l00407"></a><span class="lineno">  407</span>            <span class="comment">// 0x00001000 [12]    CLK_SYS_PIO0 (0) </span></div>
<div class="line"><a id="l00408" name="l00408"></a><span class="lineno">  408</span>            <span class="comment">// 0x00000800 [11]    CLK_SYS_PADS (0) </span></div>
<div class="line"><a id="l00409" name="l00409"></a><span class="lineno">  409</span>            <span class="comment">// 0x00000400 [10]    CLK_SYS_LDO_POR (0) </span></div>
<div class="line"><a id="l00410" name="l00410"></a><span class="lineno">  410</span>            <span class="comment">// 0x00000200 [9]     CLK_SYS_JTAG (0) </span></div>
<div class="line"><a id="l00411" name="l00411"></a><span class="lineno">  411</span>            <span class="comment">// 0x00000100 [8]     CLK_SYS_IO   (0) </span></div>
<div class="line"><a id="l00412" name="l00412"></a><span class="lineno">  412</span>            <span class="comment">// 0x00000080 [7]     CLK_SYS_I2C1 (0) </span></div>
<div class="line"><a id="l00413" name="l00413"></a><span class="lineno">  413</span>            <span class="comment">// 0x00000040 [6]     CLK_SYS_I2C0 (0) </span></div>
<div class="line"><a id="l00414" name="l00414"></a><span class="lineno">  414</span>            <span class="comment">// 0x00000020 [5]     CLK_SYS_DMA  (0) </span></div>
<div class="line"><a id="l00415" name="l00415"></a><span class="lineno">  415</span>            <span class="comment">// 0x00000010 [4]     CLK_SYS_BUSFABRIC (0) </span></div>
<div class="line"><a id="l00416" name="l00416"></a><span class="lineno">  416</span>            <span class="comment">// 0x00000008 [3]     CLK_SYS_BUSCTRL (0) </span></div>
<div class="line"><a id="l00417" name="l00417"></a><span class="lineno">  417</span>            <span class="comment">// 0x00000004 [2]     CLK_SYS_ADC0 (0) </span></div>
<div class="line"><a id="l00418" name="l00418"></a><span class="lineno">  418</span>            <span class="comment">// 0x00000002 [1]     CLK_ADC_ADC0 (0) </span></div>
<div class="line"><a id="l00419" name="l00419"></a><span class="lineno">  419</span>            <span class="comment">// 0x00000001 [0]     CLK_SYS_CLOCKS_BANK_DEFAULT (0) </span></div>
<div class="line"><a id="l00420" name="l00420"></a><span class="lineno">  420</span>            io_ro_32 enabled0; </div>
<div class="line"><a id="l00421" name="l00421"></a><span class="lineno">  421</span> </div>
<div class="line"><a id="l00422" name="l00422"></a><span class="lineno">  422</span>            _REG_(CLOCKS_ENABLED1_OFFSET) <span class="comment">// CLOCKS_ENABLED1</span></div>
<div class="line"><a id="l00423" name="l00423"></a><span class="lineno">  423</span>            <span class="comment">// indicates the state of the clock enable</span></div>
<div class="line"><a id="l00424" name="l00424"></a><span class="lineno">  424</span>            <span class="comment">// 0x00004000 [14]    CLK_SYS_XOSC (0) </span></div>
<div class="line"><a id="l00425" name="l00425"></a><span class="lineno">  425</span>            <span class="comment">// 0x00002000 [13]    CLK_SYS_XIP  (0) </span></div>
<div class="line"><a id="l00426" name="l00426"></a><span class="lineno">  426</span>            <span class="comment">// 0x00001000 [12]    CLK_SYS_WATCHDOG (0) </span></div>
<div class="line"><a id="l00427" name="l00427"></a><span class="lineno">  427</span>            <span class="comment">// 0x00000800 [11]    CLK_USB_USBCTRL (0) </span></div>
<div class="line"><a id="l00428" name="l00428"></a><span class="lineno">  428</span>            <span class="comment">// 0x00000400 [10]    CLK_SYS_USBCTRL (0) </span></div>
<div class="line"><a id="l00429" name="l00429"></a><span class="lineno">  429</span>            <span class="comment">// 0x00000200 [9]     CLK_SYS_UART1 (0) </span></div>
<div class="line"><a id="l00430" name="l00430"></a><span class="lineno">  430</span>            <span class="comment">// 0x00000100 [8]     CLK_PERI_UART1 (0) </span></div>
<div class="line"><a id="l00431" name="l00431"></a><span class="lineno">  431</span>            <span class="comment">// 0x00000080 [7]     CLK_SYS_UART0 (0) </span></div>
<div class="line"><a id="l00432" name="l00432"></a><span class="lineno">  432</span>            <span class="comment">// 0x00000040 [6]     CLK_PERI_UART0 (0) </span></div>
<div class="line"><a id="l00433" name="l00433"></a><span class="lineno">  433</span>            <span class="comment">// 0x00000020 [5]     CLK_SYS_TIMER (0) </span></div>
<div class="line"><a id="l00434" name="l00434"></a><span class="lineno">  434</span>            <span class="comment">// 0x00000010 [4]     CLK_SYS_TBMAN (0) </span></div>
<div class="line"><a id="l00435" name="l00435"></a><span class="lineno">  435</span>            <span class="comment">// 0x00000008 [3]     CLK_SYS_SYSINFO (0) </span></div>
<div class="line"><a id="l00436" name="l00436"></a><span class="lineno">  436</span>            <span class="comment">// 0x00000004 [2]     CLK_SYS_SYSCFG (0) </span></div>
<div class="line"><a id="l00437" name="l00437"></a><span class="lineno">  437</span>            <span class="comment">// 0x00000002 [1]     CLK_SYS_SRAM5 (0) </span></div>
<div class="line"><a id="l00438" name="l00438"></a><span class="lineno">  438</span>            <span class="comment">// 0x00000001 [0]     CLK_SYS_SRAM4 (0) </span></div>
<div class="line"><a id="l00439" name="l00439"></a><span class="lineno">  439</span>            io_ro_32 enabled1; </div>
<div class="line"><a id="l00440" name="l00440"></a><span class="lineno">  440</span>        };</div>
<div class="line"><a id="l00441" name="l00441"></a><span class="lineno">  441</span>        <span class="comment">// (Description copied from array index 0 register CLOCKS_ENABLED0 applies similarly to other array indexes)</span></div>
<div class="line"><a id="l00442" name="l00442"></a><span class="lineno">  442</span>        _REG_(CLOCKS_ENABLED0_OFFSET) <span class="comment">// CLOCKS_ENABLED0</span></div>
<div class="line"><a id="l00443" name="l00443"></a><span class="lineno">  443</span>        <span class="comment">// indicates the state of the clock enable</span></div>
<div class="line"><a id="l00444" name="l00444"></a><span class="lineno">  444</span>        <span class="comment">// 0x80000000 [31]    CLK_SYS_SRAM3 (0) </span></div>
<div class="line"><a id="l00445" name="l00445"></a><span class="lineno">  445</span>        <span class="comment">// 0x40000000 [30]    CLK_SYS_SRAM2 (0) </span></div>
<div class="line"><a id="l00446" name="l00446"></a><span class="lineno">  446</span>        <span class="comment">// 0x20000000 [29]    CLK_SYS_SRAM1 (0) </span></div>
<div class="line"><a id="l00447" name="l00447"></a><span class="lineno">  447</span>        <span class="comment">// 0x10000000 [28]    CLK_SYS_SRAM0 (0) </span></div>
<div class="line"><a id="l00448" name="l00448"></a><span class="lineno">  448</span>        <span class="comment">// 0x08000000 [27]    CLK_SYS_SPI1 (0) </span></div>
<div class="line"><a id="l00449" name="l00449"></a><span class="lineno">  449</span>        <span class="comment">// 0x04000000 [26]    CLK_PERI_SPI1 (0) </span></div>
<div class="line"><a id="l00450" name="l00450"></a><span class="lineno">  450</span>        <span class="comment">// 0x02000000 [25]    CLK_SYS_SPI0 (0) </span></div>
<div class="line"><a id="l00451" name="l00451"></a><span class="lineno">  451</span>        <span class="comment">// 0x01000000 [24]    CLK_PERI_SPI0 (0) </span></div>
<div class="line"><a id="l00452" name="l00452"></a><span class="lineno">  452</span>        <span class="comment">// 0x00800000 [23]    CLK_SYS_SIO  (0) </span></div>
<div class="line"><a id="l00453" name="l00453"></a><span class="lineno">  453</span>        <span class="comment">// 0x00400000 [22]    CLK_SYS_RTC  (0) </span></div>
<div class="line"><a id="l00454" name="l00454"></a><span class="lineno">  454</span>        <span class="comment">// 0x00200000 [21]    CLK_RTC_RTC  (0) </span></div>
<div class="line"><a id="l00455" name="l00455"></a><span class="lineno">  455</span>        <span class="comment">// 0x00100000 [20]    CLK_SYS_ROSC (0) </span></div>
<div class="line"><a id="l00456" name="l00456"></a><span class="lineno">  456</span>        <span class="comment">// 0x00080000 [19]    CLK_SYS_ROM  (0) </span></div>
<div class="line"><a id="l00457" name="l00457"></a><span class="lineno">  457</span>        <span class="comment">// 0x00040000 [18]    CLK_SYS_RESETS (0) </span></div>
<div class="line"><a id="l00458" name="l00458"></a><span class="lineno">  458</span>        <span class="comment">// 0x00020000 [17]    CLK_SYS_PWM  (0) </span></div>
<div class="line"><a id="l00459" name="l00459"></a><span class="lineno">  459</span>        <span class="comment">// 0x00010000 [16]    CLK_SYS_PSM  (0) </span></div>
<div class="line"><a id="l00460" name="l00460"></a><span class="lineno">  460</span>        <span class="comment">// 0x00008000 [15]    CLK_SYS_PLL_USB (0) </span></div>
<div class="line"><a id="l00461" name="l00461"></a><span class="lineno">  461</span>        <span class="comment">// 0x00004000 [14]    CLK_SYS_PLL_SYS (0) </span></div>
<div class="line"><a id="l00462" name="l00462"></a><span class="lineno">  462</span>        <span class="comment">// 0x00002000 [13]    CLK_SYS_PIO1 (0) </span></div>
<div class="line"><a id="l00463" name="l00463"></a><span class="lineno">  463</span>        <span class="comment">// 0x00001000 [12]    CLK_SYS_PIO0 (0) </span></div>
<div class="line"><a id="l00464" name="l00464"></a><span class="lineno">  464</span>        <span class="comment">// 0x00000800 [11]    CLK_SYS_PADS (0) </span></div>
<div class="line"><a id="l00465" name="l00465"></a><span class="lineno">  465</span>        <span class="comment">// 0x00000400 [10]    CLK_SYS_VREG_AND_CHIP_RESET (0) </span></div>
<div class="line"><a id="l00466" name="l00466"></a><span class="lineno">  466</span>        <span class="comment">// 0x00000200 [9]     CLK_SYS_JTAG (0) </span></div>
<div class="line"><a id="l00467" name="l00467"></a><span class="lineno">  467</span>        <span class="comment">// 0x00000100 [8]     CLK_SYS_IO   (0) </span></div>
<div class="line"><a id="l00468" name="l00468"></a><span class="lineno">  468</span>        <span class="comment">// 0x00000080 [7]     CLK_SYS_I2C1 (0) </span></div>
<div class="line"><a id="l00469" name="l00469"></a><span class="lineno">  469</span>        <span class="comment">// 0x00000040 [6]     CLK_SYS_I2C0 (0) </span></div>
<div class="line"><a id="l00470" name="l00470"></a><span class="lineno">  470</span>        <span class="comment">// 0x00000020 [5]     CLK_SYS_DMA  (0) </span></div>
<div class="line"><a id="l00471" name="l00471"></a><span class="lineno">  471</span>        <span class="comment">// 0x00000010 [4]     CLK_SYS_BUSFABRIC (0) </span></div>
<div class="line"><a id="l00472" name="l00472"></a><span class="lineno">  472</span>        <span class="comment">// 0x00000008 [3]     CLK_SYS_BUSCTRL (0) </span></div>
<div class="line"><a id="l00473" name="l00473"></a><span class="lineno">  473</span>        <span class="comment">// 0x00000004 [2]     CLK_SYS_ADC  (0) </span></div>
<div class="line"><a id="l00474" name="l00474"></a><span class="lineno">  474</span>        <span class="comment">// 0x00000002 [1]     CLK_ADC_ADC  (0) </span></div>
<div class="line"><a id="l00475" name="l00475"></a><span class="lineno">  475</span>        <span class="comment">// 0x00000001 [0]     CLK_SYS_CLOCKS (0) </span></div>
<div class="line"><a id="l00476" name="l00476"></a><span class="lineno">  476</span>        io_ro_32 enabled[2];</div>
<div class="line"><a id="l00477" name="l00477"></a><span class="lineno">  477</span>    };</div>
<div class="line"><a id="l00478" name="l00478"></a><span class="lineno">  478</span> </div>
<div class="line"><a id="l00479" name="l00479"></a><span class="lineno">  479</span>    _REG_(CLOCKS_INTR_OFFSET) <span class="comment">// CLOCKS_INTR</span></div>
<div class="line"><a id="l00480" name="l00480"></a><span class="lineno">  480</span>    <span class="comment">// Raw Interrupts</span></div>
<div class="line"><a id="l00481" name="l00481"></a><span class="lineno">  481</span>    <span class="comment">// 0x00000001 [0]     CLK_SYS_RESUS (0) </span></div>
<div class="line"><a id="l00482" name="l00482"></a><span class="lineno">  482</span>    io_ro_32 intr;</div>
<div class="line"><a id="l00483" name="l00483"></a><span class="lineno">  483</span> </div>
<div class="line"><a id="l00484" name="l00484"></a><span class="lineno">  484</span>    _REG_(CLOCKS_INTE_OFFSET) <span class="comment">// CLOCKS_INTE</span></div>
<div class="line"><a id="l00485" name="l00485"></a><span class="lineno">  485</span>    <span class="comment">// Interrupt Enable</span></div>
<div class="line"><a id="l00486" name="l00486"></a><span class="lineno">  486</span>    <span class="comment">// 0x00000001 [0]     CLK_SYS_RESUS (0) </span></div>
<div class="line"><a id="l00487" name="l00487"></a><span class="lineno">  487</span>    io_rw_32 inte;</div>
<div class="line"><a id="l00488" name="l00488"></a><span class="lineno">  488</span> </div>
<div class="line"><a id="l00489" name="l00489"></a><span class="lineno">  489</span>    _REG_(CLOCKS_INTF_OFFSET) <span class="comment">// CLOCKS_INTF</span></div>
<div class="line"><a id="l00490" name="l00490"></a><span class="lineno">  490</span>    <span class="comment">// Interrupt Force</span></div>
<div class="line"><a id="l00491" name="l00491"></a><span class="lineno">  491</span>    <span class="comment">// 0x00000001 [0]     CLK_SYS_RESUS (0) </span></div>
<div class="line"><a id="l00492" name="l00492"></a><span class="lineno">  492</span>    io_rw_32 intf;</div>
<div class="line"><a id="l00493" name="l00493"></a><span class="lineno">  493</span> </div>
<div class="line"><a id="l00494" name="l00494"></a><span class="lineno">  494</span>    _REG_(CLOCKS_INTS_OFFSET) <span class="comment">// CLOCKS_INTS</span></div>
<div class="line"><a id="l00495" name="l00495"></a><span class="lineno">  495</span>    <span class="comment">// Interrupt status after masking &amp; forcing</span></div>
<div class="line"><a id="l00496" name="l00496"></a><span class="lineno">  496</span>    <span class="comment">// 0x00000001 [0]     CLK_SYS_RESUS (0) </span></div>
<div class="line"><a id="l00497" name="l00497"></a><span class="lineno">  497</span>    io_ro_32 ints;</div>
<div class="line"><a id="l00498" name="l00498"></a><span class="lineno">  498</span>} <a class="code hl_struct" href="structclocks__hw__t.html">clocks_hw_t</a>;</div>
<div class="line"><a id="l00499" name="l00499"></a><span class="lineno">  499</span> </div>
<div class="line"><a id="l00500" name="l00500"></a><span class="lineno">  500</span><span class="preprocessor">#define clocks_hw ((clocks_hw_t *)CLOCKS_BASE)</span></div>
<div class="line"><a id="l00501" name="l00501"></a><span class="lineno">  501</span><span class="keyword">static_assert</span>(<span class="keyword">sizeof</span> (<a class="code hl_struct" href="structclocks__hw__t.html">clocks_hw_t</a>) == 0x00c8, <span class="stringliteral">&quot;&quot;</span>);</div>
<div class="line"><a id="l00502" name="l00502"></a><span class="lineno">  502</span> </div>
<div class="line"><a id="l00503" name="l00503"></a><span class="lineno">  503</span><span class="preprocessor">#endif </span><span class="comment">// _HARDWARE_STRUCTS_CLOCKS_H</span></div>
<div class="line"><a id="l00504" name="l00504"></a><span class="lineno">  504</span> </div>
<div class="ttc" id="aaddress__mapped_8h_html"><div class="ttname"><a href="address__mapped_8h.html">address_mapped.h</a></div></div>
<div class="ttc" id="agroup__hardware__clocks_html_ga531be47022a78745db42ab7b29da20e0"><div class="ttname"><a href="group__hardware__clocks.html#ga531be47022a78745db42ab7b29da20e0">clock_dest_num_rp2040</a></div><div class="ttdeci">clock_dest_num_rp2040</div><div class="ttdoc">Clock destination numbers on RP2040 (used as typedef clock_dest_num_t)</div><div class="ttdef"><b>Definition:</b> clocks.h:48</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_ga9191dff316e7d1c4753f6dff2a72ce77"><div class="ttname"><a href="group__hardware__clocks.html#ga9191dff316e7d1c4753f6dff2a72ce77">clock_dest_num_t</a></div><div class="ttdeci">enum clock_dest_num_rp2040 clock_dest_num_t</div><div class="ttdoc">Clock destination numbers on RP2040 (used as typedef clock_dest_num_t)</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gacf8c8ac7970cacdec6c5f62a62926644"><div class="ttname"><a href="group__hardware__clocks.html#gacf8c8ac7970cacdec6c5f62a62926644">clock_num_rp2040</a></div><div class="ttdeci">clock_num_rp2040</div><div class="ttdoc">Clock numbers on RP2040 (used as typedef clock_num_t)</div><div class="ttdef"><b>Definition:</b> clocks.h:30</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gae5b3d4a25ed3bb4916782746a6279507"><div class="ttname"><a href="group__hardware__clocks.html#gae5b3d4a25ed3bb4916782746a6279507">clock_num_t</a></div><div class="ttdeci">enum clock_num_rp2040 clock_num_t</div><div class="ttdoc">Clock numbers on RP2040 (used as typedef clock_num_t)</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a15ec1c8d5bbfc27b125f8cee2bfdd195"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a15ec1c8d5bbfc27b125f8cee2bfdd195">CLK_DEST_SYS_BUSCTRL</a></div><div class="ttdeci">@ CLK_DEST_SYS_BUSCTRL</div><div class="ttdoc">Select SYS_BUSCTRL as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:52</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a1b7c866f60f6d7a3599851eda6236873"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a1b7c866f60f6d7a3599851eda6236873">CLK_DEST_SYS_PIO1</a></div><div class="ttdeci">@ CLK_DEST_SYS_PIO1</div><div class="ttdoc">Select SYS_PIO1 as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:62</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a1cd7587c812db4711ac8d27773fb8e14"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a1cd7587c812db4711ac8d27773fb8e14">CLK_DEST_SYS_SIO</a></div><div class="ttdeci">@ CLK_DEST_SYS_SIO</div><div class="ttdoc">Select SYS_SIO as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:72</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a1dc3155054ea4ba3d0d93c26fdea0d4d"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a1dc3155054ea4ba3d0d93c26fdea0d4d">CLK_DEST_SYS_PSM</a></div><div class="ttdeci">@ CLK_DEST_SYS_PSM</div><div class="ttdoc">Select SYS_PSM as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:65</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a2251766749e744153aaf4d346106b69c"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a2251766749e744153aaf4d346106b69c">CLK_DEST_SYS_UART0</a></div><div class="ttdeci">@ CLK_DEST_SYS_UART0</div><div class="ttdoc">Select SYS_UART0 as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:88</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a23baa826e55d0832bce75b9e2e754a57"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a23baa826e55d0832bce75b9e2e754a57">CLK_DEST_SYS_TBMAN</a></div><div class="ttdeci">@ CLK_DEST_SYS_TBMAN</div><div class="ttdoc">Select SYS_TBMAN as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:85</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a271e8b16de996d59cf242f3aca93a2f4"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a271e8b16de996d59cf242f3aca93a2f4">CLK_DEST_SYS_PLL_USB</a></div><div class="ttdeci">@ CLK_DEST_SYS_PLL_USB</div><div class="ttdoc">Select SYS_PLL_USB as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:64</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a2a29b91d850c1b0b6dd1610d8b2f361a"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a2a29b91d850c1b0b6dd1610d8b2f361a">CLK_DEST_SYS_USBCTRL</a></div><div class="ttdeci">@ CLK_DEST_SYS_USBCTRL</div><div class="ttdoc">Select SYS_USBCTRL as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:91</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a2e51b16c56acbeb6653950af41e53b76"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a2e51b16c56acbeb6653950af41e53b76">CLK_DEST_PERI_UART0</a></div><div class="ttdeci">@ CLK_DEST_PERI_UART0</div><div class="ttdoc">Select PERI_UART0 as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:87</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a48d42cf1310af2059f28646feb4b3dc0"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a48d42cf1310af2059f28646feb4b3dc0">CLK_DEST_SYS_I2C1</a></div><div class="ttdeci">@ CLK_DEST_SYS_I2C1</div><div class="ttdoc">Select SYS_I2C1 as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:56</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a5073bc32f089257f5ce13fcf9dccfd66"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a5073bc32f089257f5ce13fcf9dccfd66">CLK_DEST_SYS_PADS</a></div><div class="ttdeci">@ CLK_DEST_SYS_PADS</div><div class="ttdoc">Select SYS_PADS as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:60</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a55ccc9b0512b87373e0ebed3bc0a3675"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a55ccc9b0512b87373e0ebed3bc0a3675">CLK_DEST_SYS_XIP</a></div><div class="ttdeci">@ CLK_DEST_SYS_XIP</div><div class="ttdoc">Select SYS_XIP as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:94</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a5c1252a95489d26504d348a6f19e67b0"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a5c1252a95489d26504d348a6f19e67b0">CLK_DEST_SYS_SRAM1</a></div><div class="ttdeci">@ CLK_DEST_SYS_SRAM1</div><div class="ttdoc">Select SYS_SRAM1 as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:78</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a677f4e9d98d29174fec1004f6e23b2c2"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a677f4e9d98d29174fec1004f6e23b2c2">CLK_DEST_SYS_SRAM4</a></div><div class="ttdeci">@ CLK_DEST_SYS_SRAM4</div><div class="ttdoc">Select SYS_SRAM4 as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:81</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a67d5461d0b587344012b3e6115a97268"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a67d5461d0b587344012b3e6115a97268">CLK_DEST_PERI_UART1</a></div><div class="ttdeci">@ CLK_DEST_PERI_UART1</div><div class="ttdoc">Select PERI_UART1 as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:89</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a6924053ca1ffe2b13ae349b720d61444"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a6924053ca1ffe2b13ae349b720d61444">CLK_DEST_SYS_WATCHDOG</a></div><div class="ttdeci">@ CLK_DEST_SYS_WATCHDOG</div><div class="ttdoc">Select SYS_WATCHDOG as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:93</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a6ee938da9230f98365dc67ece536c0d4"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a6ee938da9230f98365dc67ece536c0d4">CLK_DEST_SYS_ROSC</a></div><div class="ttdeci">@ CLK_DEST_SYS_ROSC</div><div class="ttdoc">Select SYS_ROSC as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:69</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a7ad1ec92e507d96db3c62458345388b3"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a7ad1ec92e507d96db3c62458345388b3">CLK_DEST_SYS_PIO0</a></div><div class="ttdeci">@ CLK_DEST_SYS_PIO0</div><div class="ttdoc">Select SYS_PIO0 as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:61</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a7ae6e07aa86527443649f572c24d1122"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a7ae6e07aa86527443649f572c24d1122">CLK_DEST_SYS_SRAM2</a></div><div class="ttdeci">@ CLK_DEST_SYS_SRAM2</div><div class="ttdoc">Select SYS_SRAM2 as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:79</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a7b3c35197cbab8b5ab72b48a82f32311"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a7b3c35197cbab8b5ab72b48a82f32311">CLK_DEST_SYS_SRAM5</a></div><div class="ttdeci">@ CLK_DEST_SYS_SRAM5</div><div class="ttdoc">Select SYS_SRAM5 as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:82</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a7db9d6d1b85c7e8d013147af55ac254f"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a7db9d6d1b85c7e8d013147af55ac254f">CLK_DEST_SYS_SPI1</a></div><div class="ttdeci">@ CLK_DEST_SYS_SPI1</div><div class="ttdoc">Select SYS_SPI1 as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:76</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a82f9dca3d810a91d3bcb0c55bb0f4c19"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a82f9dca3d810a91d3bcb0c55bb0f4c19">CLK_DEST_ADC_ADC</a></div><div class="ttdeci">@ CLK_DEST_ADC_ADC</div><div class="ttdoc">Select ADC_ADC as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:50</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a863510ab355fb0af8763acca9d54146a"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a863510ab355fb0af8763acca9d54146a">CLK_DEST_RTC_RTC</a></div><div class="ttdeci">@ CLK_DEST_RTC_RTC</div><div class="ttdoc">Select RTC_RTC as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:70</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a86acc3f11f842c926a33e9041f0d7d97"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a86acc3f11f842c926a33e9041f0d7d97">CLK_DEST_SYS_JTAG</a></div><div class="ttdeci">@ CLK_DEST_SYS_JTAG</div><div class="ttdoc">Select SYS_JTAG as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:58</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a8791146f5044f87ecad1240400524783"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a8791146f5044f87ecad1240400524783">CLK_DEST_SYS_IO</a></div><div class="ttdeci">@ CLK_DEST_SYS_IO</div><div class="ttdoc">Select SYS_IO as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:57</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a8b535a46ba2d708945181d4cca938eac"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a8b535a46ba2d708945181d4cca938eac">CLK_DEST_SYS_SYSINFO</a></div><div class="ttdeci">@ CLK_DEST_SYS_SYSINFO</div><div class="ttdoc">Select SYS_SYSINFO as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:84</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a8f3ca54d0df7350adb6490c17f01a151"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a8f3ca54d0df7350adb6490c17f01a151">CLK_DEST_PERI_SPI0</a></div><div class="ttdeci">@ CLK_DEST_PERI_SPI0</div><div class="ttdoc">Select PERI_SPI0 as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:73</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a926ae7e7d7f16c9068b5771c4ab0cf31"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a926ae7e7d7f16c9068b5771c4ab0cf31">CLK_DEST_SYS_VREG_AND_CHIP_RESET</a></div><div class="ttdeci">@ CLK_DEST_SYS_VREG_AND_CHIP_RESET</div><div class="ttdoc">Select SYS_VREG_AND_CHIP_RESET as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:59</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a92b8a0c0a339b0f99c691fda320ff861"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a92b8a0c0a339b0f99c691fda320ff861">CLK_DEST_SYS_SYSCFG</a></div><div class="ttdeci">@ CLK_DEST_SYS_SYSCFG</div><div class="ttdoc">Select SYS_SYSCFG as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:83</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0a9efe04f57df4b458903c403addec9483"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0a9efe04f57df4b458903c403addec9483">CLK_DEST_SYS_PWM</a></div><div class="ttdeci">@ CLK_DEST_SYS_PWM</div><div class="ttdoc">Select SYS_PWM as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:66</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0aa44be434dc7d9edafd44b3a4f571a57e"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0aa44be434dc7d9edafd44b3a4f571a57e">CLK_DEST_SYS_TIMER</a></div><div class="ttdeci">@ CLK_DEST_SYS_TIMER</div><div class="ttdoc">Select SYS_TIMER as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:86</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0aa6b672bba828f538d59cffe4bc56b870"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0aa6b672bba828f538d59cffe4bc56b870">CLK_DEST_SYS_SRAM0</a></div><div class="ttdeci">@ CLK_DEST_SYS_SRAM0</div><div class="ttdoc">Select SYS_SRAM0 as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:77</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0aa7a13316822ebdd07cdff5d1153e5310"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0aa7a13316822ebdd07cdff5d1153e5310">CLK_DEST_SYS_CLOCKS</a></div><div class="ttdeci">@ CLK_DEST_SYS_CLOCKS</div><div class="ttdoc">Select SYS_CLOCKS as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:49</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0aaad38671055261992e9f624b24a708f7"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0aaad38671055261992e9f624b24a708f7">CLK_DEST_SYS_UART1</a></div><div class="ttdeci">@ CLK_DEST_SYS_UART1</div><div class="ttdoc">Select SYS_UART1 as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:90</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0aac3c334ad4b9eb5e6b77d306f9cf6690"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0aac3c334ad4b9eb5e6b77d306f9cf6690">CLK_DEST_SYS_SPI0</a></div><div class="ttdeci">@ CLK_DEST_SYS_SPI0</div><div class="ttdoc">Select SYS_SPI0 as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:74</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0aaf028e60c1678efe0e465a5c4e63be11"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0aaf028e60c1678efe0e465a5c4e63be11">CLK_DEST_SYS_PLL_SYS</a></div><div class="ttdeci">@ CLK_DEST_SYS_PLL_SYS</div><div class="ttdoc">Select SYS_PLL_SYS as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:63</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0ab4619e35c93f6d3ced95dc46a9985111"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0ab4619e35c93f6d3ced95dc46a9985111">CLK_DEST_SYS_BUSFABRIC</a></div><div class="ttdeci">@ CLK_DEST_SYS_BUSFABRIC</div><div class="ttdoc">Select SYS_BUSFABRIC as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:53</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0ab755ea73b6228c074c77af35bd685138"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0ab755ea73b6228c074c77af35bd685138">CLK_DEST_SYS_DMA</a></div><div class="ttdeci">@ CLK_DEST_SYS_DMA</div><div class="ttdoc">Select SYS_DMA as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:54</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0ac8f3984ecd0d63da5c94bc4441d5fdbf"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0ac8f3984ecd0d63da5c94bc4441d5fdbf">CLK_DEST_PERI_SPI1</a></div><div class="ttdeci">@ CLK_DEST_PERI_SPI1</div><div class="ttdoc">Select PERI_SPI1 as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:75</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0acc49f83fc860608938bf4aeb146f8076"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0acc49f83fc860608938bf4aeb146f8076">CLK_DEST_USB_USBCTRL</a></div><div class="ttdeci">@ CLK_DEST_USB_USBCTRL</div><div class="ttdoc">Select USB_USBCTRL as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:92</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0acea8045f9a17d3b88e6f3317de4998fa"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0acea8045f9a17d3b88e6f3317de4998fa">CLK_DEST_SYS_I2C0</a></div><div class="ttdeci">@ CLK_DEST_SYS_I2C0</div><div class="ttdoc">Select SYS_I2C0 as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:55</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0ad5cf6d4b4c6dcc60f79491e33604a9e9"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0ad5cf6d4b4c6dcc60f79491e33604a9e9">CLK_DEST_SYS_RESETS</a></div><div class="ttdeci">@ CLK_DEST_SYS_RESETS</div><div class="ttdoc">Select SYS_RESETS as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:67</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0ad7e2e7aeebabc9a8f4e1a6f6da524d71"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0ad7e2e7aeebabc9a8f4e1a6f6da524d71">CLK_DEST_SYS_SRAM3</a></div><div class="ttdeci">@ CLK_DEST_SYS_SRAM3</div><div class="ttdoc">Select SYS_SRAM3 as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:80</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0adbfba27500f20882fb56f18ad253fe99"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0adbfba27500f20882fb56f18ad253fe99">CLK_DEST_SYS_ADC</a></div><div class="ttdeci">@ CLK_DEST_SYS_ADC</div><div class="ttdoc">Select SYS_ADC as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:51</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0ae875abcf316976020784c41df511d47a"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0ae875abcf316976020784c41df511d47a">CLK_DEST_SYS_ROM</a></div><div class="ttdeci">@ CLK_DEST_SYS_ROM</div><div class="ttdoc">Select SYS_ROM as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:68</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0af7e06e650c8533c8a09dc9bbcee9da34"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0af7e06e650c8533c8a09dc9bbcee9da34">CLK_DEST_SYS_RTC</a></div><div class="ttdeci">@ CLK_DEST_SYS_RTC</div><div class="ttdoc">Select SYS_RTC as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:71</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_gga531be47022a78745db42ab7b29da20e0afc877f622f554735e90baea698edaf8a"><div class="ttname"><a href="group__hardware__clocks.html#gga531be47022a78745db42ab7b29da20e0afc877f622f554735e90baea698edaf8a">CLK_DEST_SYS_XOSC</a></div><div class="ttdeci">@ CLK_DEST_SYS_XOSC</div><div class="ttdoc">Select SYS_XOSC as clock destination.</div><div class="ttdef"><b>Definition:</b> clocks.h:95</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_ggacf8c8ac7970cacdec6c5f62a62926644a7af7fc21d0d48fc06d9476ebb7236e16"><div class="ttname"><a href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644a7af7fc21d0d48fc06d9476ebb7236e16">clk_rtc</a></div><div class="ttdeci">@ clk_rtc</div><div class="ttdoc">Select CLK_RTC as clock source.</div><div class="ttdef"><b>Definition:</b> clocks.h:40</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_ggacf8c8ac7970cacdec6c5f62a62926644a8c35a604478e413afed2b3c558df5c64"><div class="ttname"><a href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644a8c35a604478e413afed2b3c558df5c64">clk_gpout0</a></div><div class="ttdeci">@ clk_gpout0</div><div class="ttdoc">Select CLK_GPOUT0 as clock source.</div><div class="ttdef"><b>Definition:</b> clocks.h:31</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_ggacf8c8ac7970cacdec6c5f62a62926644a913a8ae975120951e7d5c5c3df66f20f"><div class="ttname"><a href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644a913a8ae975120951e7d5c5c3df66f20f">clk_gpout2</a></div><div class="ttdeci">@ clk_gpout2</div><div class="ttdoc">Select CLK_GPOUT2 as clock source.</div><div class="ttdef"><b>Definition:</b> clocks.h:33</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_ggacf8c8ac7970cacdec6c5f62a62926644a917c020907b42e257410e885822f6c71"><div class="ttname"><a href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644a917c020907b42e257410e885822f6c71">clk_peri</a></div><div class="ttdeci">@ clk_peri</div><div class="ttdoc">Select CLK_PERI as clock source.</div><div class="ttdef"><b>Definition:</b> clocks.h:37</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_ggacf8c8ac7970cacdec6c5f62a62926644aa1515365ea7f6fc7815d71ac584fcc65"><div class="ttname"><a href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644aa1515365ea7f6fc7815d71ac584fcc65">clk_gpout1</a></div><div class="ttdeci">@ clk_gpout1</div><div class="ttdoc">Select CLK_GPOUT1 as clock source.</div><div class="ttdef"><b>Definition:</b> clocks.h:32</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_ggacf8c8ac7970cacdec6c5f62a62926644abba6c078e66ad1a30d5b2b15b62093c4"><div class="ttname"><a href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644abba6c078e66ad1a30d5b2b15b62093c4">clk_ref</a></div><div class="ttdeci">@ clk_ref</div><div class="ttdoc">Select CLK_REF as clock source.</div><div class="ttdef"><b>Definition:</b> clocks.h:35</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_ggacf8c8ac7970cacdec6c5f62a62926644ac1ad7b83e348265a82c8d234489d62ab"><div class="ttname"><a href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644ac1ad7b83e348265a82c8d234489d62ab">clk_sys</a></div><div class="ttdeci">@ clk_sys</div><div class="ttdoc">Select CLK_SYS as clock source.</div><div class="ttdef"><b>Definition:</b> clocks.h:36</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_ggacf8c8ac7970cacdec6c5f62a62926644acfa6bf0bcaef61805201373db18ed115"><div class="ttname"><a href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644acfa6bf0bcaef61805201373db18ed115">clk_usb</a></div><div class="ttdeci">@ clk_usb</div><div class="ttdoc">Select CLK_USB as clock source.</div><div class="ttdef"><b>Definition:</b> clocks.h:38</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_ggacf8c8ac7970cacdec6c5f62a62926644ad95941e57d81620130a1b108e0f57b51"><div class="ttname"><a href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644ad95941e57d81620130a1b108e0f57b51">clk_gpout3</a></div><div class="ttdeci">@ clk_gpout3</div><div class="ttdoc">Select CLK_GPOUT3 as clock source.</div><div class="ttdef"><b>Definition:</b> clocks.h:34</div></div>
<div class="ttc" id="agroup__hardware__clocks_html_ggacf8c8ac7970cacdec6c5f62a62926644afb4bd0bf16d8916c4cb56fa77b4f0b0d"><div class="ttname"><a href="group__hardware__clocks.html#ggacf8c8ac7970cacdec6c5f62a62926644afb4bd0bf16d8916c4cb56fa77b4f0b0d">clk_adc</a></div><div class="ttdeci">@ clk_adc</div><div class="ttdoc">Select CLK_ADC as clock source.</div><div class="ttdef"><b>Definition:</b> clocks.h:39</div></div>
<div class="ttc" id="astructclock__hw__t_html"><div class="ttname"><a href="structclock__hw__t.html">clock_hw_t</a></div><div class="ttdef"><b>Definition:</b> clocks.h:100</div></div>
<div class="ttc" id="astructclock__resus__hw__t_html"><div class="ttname"><a href="structclock__resus__hw__t.html">clock_resus_hw_t</a></div><div class="ttdef"><b>Definition:</b> clocks.h:124</div></div>
<div class="ttc" id="astructclocks__hw__t_html"><div class="ttname"><a href="structclocks__hw__t.html">clocks_hw_t</a></div><div class="ttdef"><b>Definition:</b> clocks.h:187</div></div>
<div class="ttc" id="astructfc__hw__t_html"><div class="ttname"><a href="structfc__hw__t.html">fc_hw_t</a></div><div class="ttdef"><b>Definition:</b> clocks.h:137</div></div>
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